Morin Dehan

According to our database1, Morin Dehan authored at least 17 papers between 2005 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2016
Towards high performance sub-10nm finW bulk FinFET technology.
Proceedings of the 46th European Solid-State Device Research Conference, 2016

2015
Impact of fin shape variability on device performance towards 10nm node.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

2014

2013
STI and eSiGe source/drain epitaxy induced stress modeling in 28 nm technology with replacement gate (RMG) process.
Proceedings of the European Solid-State Device Research Conference, 2013

2011
Design Issues and Considerations for Low-Cost 3-D TSV IC Technology.
IEEE J. Solid State Circuits, 2011

2010
Identifying the Bottlenecks to the RF Performance of FinFETs.
Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010


Verifying electrical/thermal/thermo-mechanical behavior of a 3D stack - Challenges and solutions.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009
A plug-and-play wideband RF circuit ESD protection methodology: T-diodes.
Microelectron. Reliab., 2009

FinFET RF receiver building blocks operating above 10 GHz.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

Low-cost feedback-enabled LNAs in 45nm CMOS.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

2008
A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS.
IEEE J. Solid State Circuits, 2008

Advanced Planar Bulk and Multigate CMOS Technology: Analog-Circuit Benchmarking up to mm-Wave Frequencies.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2007
The Potential of FinFETs for Analog and RF Circuit Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007

FinFET technology for analog and RF circuits.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

An Accurate Scalable Compact Model for the Substrate Resistance of RF MOSFETs.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2005
Low-power voltage-controlled oscillators in 90-nm CMOS using high-quality thin-film postprocessed inductors.
IEEE J. Solid State Circuits, 2005


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