Stefaan Decoutere

According to our database1, Stefaan Decoutere authored at least 48 papers between 2001 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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On csauthors.net:

Bibliography

2023
High- Temperature PBTI in Trench-Gate Vertical GaN Power MOSFETs: Role of Border and Semiconductor Traps.
Proceedings of the IEEE International Reliability Physics Symposium, 2023

2022
Analysis and Design of a Fully-Integrated Pulsed LiDAR Driver in 100V-GaN IC Technology.
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022

Gate Reliability of p-GaN Power HEMTs Under Pulsed Stress Condition.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

Influence of Drain and Gate Potential on Gate Failure in Semi-Vertical GaN-on-Si Trench MOSFETs.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

Device optimization for 200V GaN-on-SOI Platform for Monolithicly Integrated Power Circuits.
Proceedings of the 52nd IEEE European Solid-State Device Research Conference, 2022

2021
An E-mode p-GaN HEMT monolithically-integrated three-level gate driver operating with a single voltage supply.
IEICE Electron. Express, 2021

Vertical stack reliability of GaN-on-Si buffers for low-voltage applications.
Proceedings of the IEEE International Reliability Physics Symposium, 2021

ON-state reliability of GaN-on-Si Schottky Barrier Diodes: Si3N4 vs. Al2O3/SiO2 GET dielectric.
Proceedings of the IEEE International Reliability Physics Symposium, 2021

2020
Demonstration of Bilayer Gate Insulator for Improved Reliability in GaN-on-Si Vertical Transistors.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2019
Monolithic integration of gate driver and p-GaN power HEMT for MHz-switching implemented by e-mode GaN-on-SOI process.
IEICE Electron. Express, 2019

Perimeter Driven Transport in the p-GaN Gate as a Limiting Factor for Gate Reliability.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

Monolithically integrated GaN power ICs designed using the MIT virtual source GaNFET (MVSG) compact model for enhancement-mode p-GaN gate power HEMTs, logic transistors and resistors.
Proceedings of the 49th European Solid-State Device Research Conference, 2019

2018
Impact of the substrate and buffer design on the performance of GaN on Si power HEMTs.
Microelectron. Reliab., 2018

2017
Field- and current-driven degradation of GaN-based power HEMTs with p-GaN gate: Dependence on Mg-doping level.
Microelectron. Reliab., 2017

Analysis of multifinger power HEMTs supported by effective 3-D device electrothermal simulation.
Microelectron. Reliab., 2017

2016
Study of the stability of e-mode GaN HEMTs with p-GaN gate based on combined DC and optical analysis.
Microelectron. Reliab., 2016

Trapping and reliability issues in GaN-based MIS HEMTs with partially recessed gate.
Microelectron. Reliab., 2016

2015
Impact of gate insulator on the dc and dynamic performance of AlGaN/GaN MIS-HEMTs.
Microelectron. Reliab., 2015

Time dependent dielectric breakdown (TDDB) evaluation of PE-ALD SiN gate dielectrics on AlGaN/GaN recessed gate D-mode MIS-HEMTs and E-mode MIS-FETs.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

2014
Stability evaluation of Au-free Ohmic contacts on AlGaN/GaN HEMTs under a constant current stress.
Microelectron. Reliab., 2014

Physical origin of current collapse in Au-free AlGaN/GaN Schottky Barrier Diodes.
Microelectron. Reliab., 2014

Breakdown investigation in GaN-based MIS-HEMT devices.
Proceedings of the 44th European Solid State Device Research Conference, 2014

2012
Reliability of AlGaN/GaN HEMTs: Permanent leakage current increase and output current drop.
Microelectron. Reliab., 2012

High temperature behaviour of GaN-on-Si high power MISHEMT devices.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012

2011
GaN-based HEMTs tested under high temperature storage test.
Microelectron. Reliab., 2011

2010
Identifying the Bottlenecks to the RF Performance of FinFETs.
Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010

45-nm Planar bulk-CMOS 23-GHz LNAs with high-Q above-IC inductors.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
A plug-and-play wideband RF circuit ESD protection methodology: T-diodes.
Microelectron. Reliab., 2009

FinFET RF receiver building blocks operating above 10 GHz.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

Pushing the speed limits of SiGe: C HBTs up to 0.5 Terahertz.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008
Advanced Planar Bulk and Multigate CMOS Technology: Analog-Circuit Benchmarking up to mm-Wave Frequencies.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A 400 μW 4.7-to-6.4GHz VCO under an Above-IC Inductor in 45nm CMOS.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2007
The Potential of FinFETs for Analog and RF Circuit Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007

FinFET technology for analog and RF circuits.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

An Accurate Scalable Compact Model for the Substrate Resistance of RF MOSFETs.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006
Implementation of plug-and-play ESD protection in 5.5GHz 90nm RF CMOS LNAs - Concepts, constraints and solutions.
Microelectron. Reliab., 2006

A 0.16pJ/Conversion-Step 2.5mW 1.25GS/s 4b ADC in a 90nm Digital CMOS Process.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

Technologies for (sub-) 45nm Analog/RF CMOS - Circuit Design Opportunities and Challenges.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005
A 5-GHz fully integrated ESD-protected low-noise amplifier in 90-nm RF CMOS.
IEEE J. Solid State Circuits, 2005

Low-power voltage-controlled oscillators in 90-nm CMOS using high-quality thin-film postprocessed inductors.
IEEE J. Solid State Circuits, 2005

<i>RFCV</i> Test Structure Design for a Selected Frequency Range.
IEICE Trans. Electron., 2005

24 GHz LNA in 90nm RF-CMOS with high-Q above-IC inductors.
Proceedings of the 31st European Solid-State Circuits Conference, 2005

Low-power low-noise highly ESD robust LNA, and VCO design using above-IC inductors.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

RF ESD protection strategies - the design and performance trade-off challenges.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004
A 328 μW 5 GHz voltage-controlled oscillator in 90 nm CMOS with high-quality thin-film post-processed inductor.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2002
Physics-based closed-form inductance expression for compact modeling of integrated spiral inductors.
IEEE J. Solid State Circuits, 2002

An easy-to-use mismatch model for the MOS transistor.
IEEE J. Solid State Circuits, 2002

2001
Impact of gate oxide nitridation process on 1/f noise in 0.18 mum CMOS.
Microelectron. Reliab., 2001


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