Narcís Rodas

According to our database, Narcís Rodas authored at least 6 papers between 2022 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2026

REPTILES: Repeated Tiles of Sargantana, a RISC-V multicore based on OpenPiton.

Noelia Oliete-Escuín, Arnau Bigas, Narcís Rodas, Albert Aguilera, Sajjad Ahmad, Jonathan Balkind, Xavier Carril, Max Doblas, Iván Díaz, Roger Figueras, Alireza Foroodnia, César Fuguet, R. Ignacio Genovese, Raúl Gilabert, Abbas Haghi, Alexander Kropotov, Neiel Leyva, Oscar Lostes-Cazorla, Lorién López-Villellas, Davy Million, Alireza Monemi, Sérik Pérez, Juan Antonio Rodríguez, Víctor Soria Pardos, Behzad Salami, Francesc Moll, Oscar Palomar, Miquel Moretó, Lluc Alvarez

CoRR, May, 2026

2025

Mix-GEMM: Extending RISC-V CPUs for Energy-Efficient Mixed-Precision DNN Inference Using Binary Segmentation.

Jordi Fornt, Enrico Reggiani, Pau Fontova-Musté, Narcís Rodas, Alessandro Pappalardo, Osman Sabri Unsal, Adrián Cristal Kestelman, Josep Altet, Francesc Moll, Jaume Abella

IEEE Trans. Computers, February, 2025

Empowering Vector Architectures for ML: The CAMP Architecture for Matrix Multiplication.

Mohammadreza Esmali Nojehdeh, Hossein Mokhtarnia, Julian Pavon, Narcís Rodas, Roger Figueras Bagué, Enrico Reggiani, Miquel Moretó, Osman S. Unsal, Adrián Cristal, Eduard Ayguadé

Proceedings of the 58th IEEE/ACM International Symposium on Microarchitecture, 2025

2023

Sargantana: An Academic SoC RISC-V Processor in 22nm FDSOI Technology.

Max Doblas, Gerard Candón, Xavier Carril, Marc Domínguez, Enric Erra, Alberto González, César Hernández, Víctor Jiménez, Vatistas Kostalampros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Jonnatan Mendoza, Josep Oltra, Julián Pavón, Cristóbal Ramírez, Narcís Rodas, Enrico Reggiani, Mario Rodríguez, Carlos Rojas, Abraham Ruiz, Hugo Safadi, Víctor Soria, Alejandro Suanes, Iván Vargas, Fernando Arreza, Roger Figueras, Pau Fontova-Musté, Joan Marimon, Ricardo Martínez, Sergio Moreno, Jordi Sacristán, Oscar Alonso, Xavier Aragonès, Adrián Cristal, Ángel Diéguez, Manuel López, Diego Mateo, Francesc Moll, Miquel Moretó, Oscar Palomar, Marco A. Ramírez, Francisco Serra-Graells, Nehir Sönmez, Lluís Terés, Osman S. Unsal, Mateo Valero, Luis Villa

Proceedings of the 38th Conference on Design of Circuits and Integrated Systems, 2023

2022

Sargantana: A 1 GHz+ In-Order RISC-V Processor with SIMD Vector Extensions in 22nm FD-SOI.

Víctor Soria Pardos, Max Doblas, Guillem López-Paradís, Gerard Candón, Narcís Rodas, Xavier Carril, Pau Fontova-Musté, Neiel Leyva, Santiago Marco-Sola, Miquel Moretó

Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

DVINO: A RISC-V Vector Processor Implemented in 65nm Technology.

Guillem Cabo, Gerard Candón, Xavier Carril, Max Doblas, Marc Domínguez, Alberto González, César Hernández, Víctor Jiménez, Vatistas Kostalampros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Jonnatan Mendoza, Francesco Minervini, Julián Pavón, Cristóbal Ramírez, Narcís Rodas, Enrico Reggiani, Mario Rodríguez, Carlos Rojas, Abraham Ruiz, Víctor Soria, Alejandro Suanes, Iván Vargas, Roger Figueras, Pau Fontova, Joan Marimon, Víctor Montabes, Adrián Cristal, Carles Hernández, Ricardo Martínez, Miquel Moretó, Francesc Moll, Oscar Palomar, Marco A. Ramírez, Antonio Rubio, Jordi Sacristán, Francisco Serra-Graells, Nehir Sönmez, Lluís Terés, Osman S. Unsal, Mateo Valero, Luis Villa

Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022