Víctor Soria

According to our database, Víctor Soria authored at least 13 papers between 2020 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2026

REPTILES: Repeated Tiles of Sargantana, a RISC-V multicore based on OpenPiton.

Noelia Oliete-Escuín, Arnau Bigas, Narcís Rodas, Albert Aguilera, Sajjad Ahmad, Jonathan Balkind, Xavier Carril, Max Doblas, Iván Díaz, Roger Figueras, Alireza Foroodnia, César Fuguet, R. Ignacio Genovese, Raúl Gilabert, Abbas Haghi, Alexander Kropotov, Neiel Leyva, Oscar Lostes-Cazorla, Lorién López-Villellas, Davy Million, Alireza Monemi, Sérik Pérez, Juan Antonio Rodríguez, Víctor Soria Pardos, Behzad Salami, Francesc Moll, Oscar Palomar, Miquel Moretó, Lluc Alvarez

CoRR, May, 2026

Ember: A Compiler for Embedding Operations on Decoupled Access-Execute Architectures.

Marco Siracusa, Olivia Hsu, Víctor Soria Pardos, Joshua Randall, Arnaud Grasset, Eric Biscondi, Douglas J. Joseph, Randy Allen, Fredrik Kjolstad, Miquel Moretó Planas, Adrià Armejach

Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2026

2025

Ember: A Compiler for Efficient Embedding Operations on Decoupled Access-Execute Architectures.

Marco Siracusa, Olivia Hsu, Víctor Soria Pardos, Joshua Randall, Arnaud Grasset, Eric Biscondi, Douglas J. Joseph, Randy Allen, Fredrik Kjolstad, Miquel Moretó Planas, Adrià Armejach

CoRR, April, 2025

A. Delegato: Locality-Aware Atomic Memory Operations on Chiplets.

Víctor Soria Pardos, Adrià Armejach, Tiago Mück, Darío Suárez Gracia, José A. Joao, Miquel Moretó

Proceedings of the 58th IEEE/ACM International Symposium on Microarchitecture, 2025

FLAMA: Architecting Floating-Point Atomic Memory Operations for Heterogeneous HPC Systems.

Víctor Soria Pardos, Adrià Armejach, Darío Suárez Gracia, Didier Martinot, Arnaud Grasset, Miquel Moretó

Proceedings of the 28th Euromicro Conference on Digital System Design, 2025

2024

GenArchBench: A genomics benchmark suite for arm HPC processors.

Lorién López-Villellas, Rubén Langarita-Benítez, Asaf Badouh, Víctor Soria Pardos, Quim Aguado-Puig, Guillem López-Paradís, Max Doblas, Javier Setoain, Chulho Kim, Makoto Ono, Adrià Armejach, Santiago Marco-Sola, Jesús Alastruey-Benedé, Pablo Ibáñez, Miquel Moretó

Future Gener. Comput. Syst., 2024

2023

A Tensor Marshaling Unit for Sparse Tensor Algebra on General-Purpose Processors.

Marco Siracusa, Víctor Soria Pardos, Francesco Sgherzi, Joshua Randall, Douglas J. Joseph, Miquel Moretó Planas, Adrià Armejach

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

DynAMO: Improving Parallelism Through Dynamic Placement of Atomic Memory Operations.

Víctor Soria Pardos, Adrià Armejach, Tiago Mück, Darío Suárez Gracia, José A. Joao, Alejandro Rico, Miquel Moretó

Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

Sargantana: An Academic SoC RISC-V Processor in 22nm FDSOI Technology.

Max Doblas, Gerard Candón, Xavier Carril, Marc Domínguez, Enric Erra, Alberto González, César Hernández, Víctor Jiménez, Vatistas Kostalampros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Jonnatan Mendoza, Josep Oltra, Julián Pavón, Cristóbal Ramírez, Narcís Rodas, Enrico Reggiani, Mario Rodríguez, Carlos Rojas, Abraham Ruiz, Hugo Safadi, Víctor Soria, Alejandro Suanes, Iván Vargas, Fernando Arreza, Roger Figueras, Pau Fontova-Musté, Joan Marimon, Ricardo Martínez, Sergio Moreno, Jordi Sacristán, Oscar Alonso, Xavier Aragonès, Adrián Cristal, Ángel Diéguez, Manuel López, Diego Mateo, Francesc Moll, Miquel Moretó, Oscar Palomar, Marco A. Ramírez, Francisco Serra-Graells, Nehir Sönmez, Lluís Terés, Osman S. Unsal, Mateo Valero, Luis Villa

Proceedings of the 38th Conference on Design of Circuits and Integrated Systems, 2023

2022

Sargantana: A 1 GHz+ In-Order RISC-V Processor with SIMD Vector Extensions in 22nm FD-SOI.

Víctor Soria Pardos, Max Doblas, Guillem López-Paradís, Gerard Candón, Narcís Rodas, Xavier Carril, Pau Fontova-Musté, Neiel Leyva, Santiago Marco-Sola, Miquel Moretó

Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

DVINO: A RISC-V Vector Processor Implemented in 65nm Technology.

Guillem Cabo, Gerard Candón, Xavier Carril, Max Doblas, Marc Domínguez, Alberto González, César Hernández, Víctor Jiménez, Vatistas Kostalampros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Jonnatan Mendoza, Francesco Minervini, Julián Pavón, Cristóbal Ramírez, Narcís Rodas, Enrico Reggiani, Mario Rodríguez, Carlos Rojas, Abraham Ruiz, Víctor Soria, Alejandro Suanes, Iván Vargas, Roger Figueras, Pau Fontova, Joan Marimon, Víctor Montabes, Adrián Cristal, Carles Hernández, Ricardo Martínez, Miquel Moretó, Francesc Moll, Oscar Palomar, Marco A. Ramírez, Antonio Rubio, Jordi Sacristán, Francisco Serra-Graells, Nehir Sönmez, Lluís Terés, Osman S. Unsal, Mateo Valero, Luis Villa

Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

2021

On the use of many-core Marvell ThunderX2 processor for HPC workloads.

Víctor Soria Pardos, Adrià Armejach, Darío Suárez Gracia, Miquel Moretó

J. Supercomput., 2021

2020

An Academic RISC-V Silicon Implementation Based on Open-Source Components.

Jaume Abella, Calvin Bulla, Guillem Cabo, Francisco J. Cazorla, Adrián Cristal, Max Doblas, Roger Figueras, Alberto González, Carles Hernández, César Hernández, Víctor Jiménez, Leonidas Kosmidis, Vatistas Kostalabros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Joan Marimon, Ricardo Martínez, Jonnatan Mendoza, Francesc Moll, Miquel Moretó, Julián Pavón, Cristóbal Ramírez, Marco Antonio Ramírez, Carlos Rojas, Antonio Rubio, Abraham Ruiz, Nehir Sönmez, Víctor Soria, Lluís Terés, Osman S. Unsal, Mateo Valero, Iván Vargas Valdivieso, Luis Villa

Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020