According to our database1, Qiwei Ren authored at least 3 papers between 2015 and 2017.
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A 0.13μm 64Mb HfOx ReRAM using configurable ramped voltage write and low read-disturb sensing techniques for reliability improvement.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
A two-port SRAM using a single-port cell array with a self-timed write-after-read control scheme to save 47% area & 63% standby power.
Proceedings of the 12th IEEE International Conference on ASIC, 2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2015