Sunghoi Hur
Orcid: 0009-0004-7616-9715
According to our database1,
Sunghoi Hur
authored at least 16 papers
between 2023 and 2025.
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Bibliography
2025
30.1 A 28Gb/mm<sup>2</sup>4XX-Layer 1Tb 3b/Cell WF-Bonding 3D-NAND Flash with 5.6Gb/s/Pin IOs.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025
New Burnout Failure at the Chip Edge: Analysis and Preventive Design by a Novel Experimental Approach.
Proceedings of the IEEE International Reliability Physics Symposium, 2025
Innovative V-NAND Flash Structure with Dual Trap Layer for Future Generations of Multi-Bit Device.
Proceedings of the IEEE International Memory Workshop, 2025
First Demonstration of Threshold Voltage Modeling in Multi-Hole V-NAND Flash Architecture with Noncircular Channel Hole Profiles.
Proceedings of the IEEE International Memory Workshop, 2025
Development of Innovative Self-Aligned SSL Mold (SASM) Scheme with Remarkable Reduction of Chip Size.
Proceedings of the IEEE International Memory Workshop, 2025
Proceedings of the IEEE International Memory Workshop, 2025
2024
Innovative Barrier Metal-Less Metal Gate Scheme Leading to Highly Reliable Cell Characteristics for 8th Generation 512Gb 3D NAND Flash Memory.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
Mechanical Stress Effects on Dielectric Leakage and Interconnection Integrity in 3D NAND Flash Memory.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
13.3 A 280-Layer 1Tb 4b/cell 3D-NAND Flash Memory with a 28.5Gb/mm2 Areal Density and a 3.2GB/s High-Speed IO Rate.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
NORNS: Three Guides for Efficient Automatic Post-Fabrication Optimization of Modern NAND Flash Memory.
Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024
2023
Kernel Smoothing Technique Based on Multiple-Coordinate System for Screening Potential Failures in NAND Flash Memory.
Proceedings of the 41st IEEE VLSI Test Symposium, 2023
Novel Strategies for Highly Uniform and Reliable Cell Characteristics of 8th Generation 1Tb 3D-NAND Flash Memory.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
High Bit Cost Scalability and Reliable Cell Characteristics for 7th Generation 1Tb 4Bit/Cell 3D-NAND Flash.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
A 3.0 Gb/s/pin 4<sup>th</sup> generation F-chip with Toggle 5.0 Specification for 16Tb NAND Flash Memory Multi chip Package.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Proceedings of the IEEE International Memory Workshop, 2023
Process Improvements for 7<sup>th</sup> Generation 1Tb Quad-Level Cell 3D NAND Flash Memory in Mass Production.
Proceedings of the IEEE International Memory Workshop, 2023