Yuyao Kong

Orcid: 0000-0001-5364-2339

According to our database1, Yuyao Kong authored at least 11 papers between 2019 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
From macro to microarchitecture: reviews and trends of SRAM-based compute-in-memory circuits.
Sci. China Inf. Sci., October, 2023

Evaluation Platform of Time-Domain Computing-in-Memory Circuits.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2023

A 28nm Horizontal-Weight-Shift and Vertical-feature-Shift-Based Separate-WL 6T-SRAM Computation-in-Memory Unit-Macro for Edge Depthwise Neural-Networks.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

A 28nm 64-kb 31.6-TFLOPS/W Digital-Domain Floating-Point-Computing-Unit and Double-Bit 6T-SRAM Computing-in-Memory Macro for Floating-Point CNNs.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2022
SNNIM: A 10T-SRAM based Spiking-Neural-Network-In-Memory architecture with capacitance computation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
TIMAQ: A Time-Domain Computing-in-Memory-Based Processor Using Predictable Decomposed Convolution for Arbitrary Quantized DNNs.
IEEE J. Solid State Circuits, 2021

Design Challenges and Methodology of High-Performance SRAM-Based Compute-in-Memory for AI Edge Devices.
Proceedings of the International Conference on UK-China Emerging Technologies, 2021

Design Methodology towards High-Precision SRAM based Computation-in-Memory for AI Edge Devices.
Proceedings of the 18th International SoC Design Conference, 2021

2020
A Time-Domain Computing-in-Memory based Processor using Predictable Decomposed Convolution for Arbitrary Quantized DNNs.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020

2019
Sandwich-RAM: An Energy-Efficient In-Memory BWN Architecture with Pulse-Width Modulation.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

In-memory Processing based on Time-domain Circuit.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019


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