Maryam Ashouei

According to our database1, Maryam Ashouei authored at least 34 papers between 2005 and 2014.

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Bibliography

2014
10.6 A 0.74V 200μW multi-standard transceiver digital baseband in 40nm LP-CMOS for 2.4GHz Bluetooth Smart / ZigBee / IEEE 802.15.6 personal area networks.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

Sub-threshold custom standard cell library validation.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

Approximate compressed sensing: ultra-low power biosignal processing via aggressive voltage scaling on a hybrid memory multi-core processor.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014

2013
Reliable and energy-efficient 1MHz 0.4V dynamically reconfigurable SoC for ExG applications in 40nm LP CMOS.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012
Ultra Low-Energy SRAM Design for Smart Ubiquitous Sensors.
IEEE Micro, 2012

Low-power wireless sensor nodes for ubiquitous long-term biomedical signal monitoring.
IEEE Commun. Mag., 2012

Noise Margin Based Library Optimization Considering Variability in Sub-threshold.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2012

Variability aware cell library optimization for reliable sub-threshold operation.
Proceedings of the 38th European Solid-State Circuit conference, 2012

Ultra low power litho friendly local assist circuitry for variability resilient 8T SRAM.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Standard cell sizing for subthreshold operation.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011
An Ultra Low Energy Biomedical Signal Processing System Operating at Near-Threshold.
IEEE Trans. Biomed. Circuits Syst., 2011

Sub-threshold synchronizer.
Microelectron. J., 2011

A 4.4 pJ/Access 80 MHz, 128 kbit Variability Resilient SRAM With Multi-Sized Sense Amplifier Redundancy.
IEEE J. Solid State Circuits, 2011

A Lightweight Security Scheme for Wireless Body Area Networks: Design, Energy Evaluation and Proposed Microprocessor Design.
J. Medical Syst., 2011

A voltage-scalable biomedical signal processor running ECG using 13pJ/cycle at 1MHz and 0.4V.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

Evaluation of 90nm 6T-SRAM as Physical Unclonable Function for secure key generation in wireless sensor nodes.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

8T SRAM with Mimicked Negative Bit-lines and Charge Limited Sequential sense amplifier for wireless sensor nodes.
Proceedings of the 37th European Solid-State Circuits Conference, 2011

Human++: Key Challenges and Trade-offs in Embedded System Design for Personal Health Care.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

2010
Post-Manufacture Tuning for Nano-CMOS Yield Recovery Using Reconfigurable Logic.
IEEE Trans. Very Large Scale Integr. Syst., 2010

Energy Efficiency Using Loop Buffer based Instruction Memory Organizations.
Proceedings of the International Workshop on Innovative Architecture for Future Generation High Performance Processors and Systems, 2010

Novel wide voltage range level shifter for near-threshold designs.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

A 4.4pJ/access 80MHz, 2K word } 64b memory with write masking feature and variability resilient multi-sized sense amplifier redundancy for wireless sensor nodes applications.
Proceedings of the 36th European Solid-State Circuits Conference, 2010

Extending Synchronization from Super-Threshold to Sub-threshold Region.
Proceedings of the 16th IEEE International Symposium on Asynchronous Circuits and Systems, 2010

2009
Checksum-Based Probabilistic Transient-Error Compensation for Linear Digital Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2009

Ultra-Low Power Sensor Design for Wireless Body Area Networks - Challenges, Potential Solutions, and Applications.
J. Digit. Content Technol. its Appl., 2009

2008
Reconfiguring CMOS as Pseudo N/PMOS for Defect Tolerance in Nano-Scale CMOS.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

2007
Probabilistic Compensation for Digital Filters Using Pervasive Noise-Induced Operator Errors.
Proceedings of the 25th IEEE VLSI Test Symposium (VTS 2007), 2007

Probabilistic Self-Adaptation of Nanoscale CMOS Circuits: Yield Maximization under Increased Intra-Die Variations.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

Probabilistic Concurrent Error Compensation in Nonlinear Digital Filters Using Linearized Checksums.
Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007

2006
Design of Soft Error Resilient Linear Digital Filters Using Checksum-Based Probabilistic Error Correction.
Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006

Statistical Estimation of Correlated Leakage Power Variation and Its Application to Leakage-Aware Design.
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

Probabilistic Error Correction in Linear Digital Filters Using Checksum Codes.
Proceedings of the 7th Latin American Test Workshop, 2006

Improving SNR for DSM Linear Systems Using Probabilistic Error Correction and State Restoration: A Comparative Study.
Proceedings of the 11th European Test Symposium, 2006

2005
A Dual-Vt Layout Approach for Statistical Leakage Variability Minimization in Nanometer CMOS.
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005


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