Mohit Kapur
Orcid: 0000-0002-2566-8619
According to our database1,
Mohit Kapur
authored at least 8 papers
between 2003 and 2024.
Collaborative distances:
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Bibliography
2024
Towards Generalized On-Chip Communication for Programmable Accelerators in Heterogeneous Architectures.
CoRR, 2024
2023
Janus: An Experimental Reconfigurable SmartNIC with P4 Programmability and SDN Isolation.
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023
2021
Proceedings of the EuroSys '21: Sixteenth European Conference on Computer Systems, 2021
2012
Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012
A cycle-accurate, cycle-reproducible multi-FPGA system for accelerating multi-core processor simulation.
Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012
2005
IEEE J. Solid State Circuits, 2005
2004
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004
2003
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003