Nobuyuki Yoshikawa
Orcid: 0000-0001-6191-6715
According to our database1,
Nobuyuki Yoshikawa
authored at least 65 papers
between 2004 and 2024.
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Bibliography
2024
Safe Multiagent Motion Planning Under Uncertainty for Drones Using Filtered Reinforcement Learning.
IEEE Trans. Robotics, 2024
2023
Safe multi-agent motion planning under uncertainty for drones using filtered reinforcement learning.
CoRR, 2023
Proceedings of the 62nd Annual Conference of the Society of Instrument and Control Engineers, 2023
Design and Implementation of an FFT-Based Neural Network Accelerator Using Rapid Single-Flux-Quantum Technology.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
SupeRBNN: Randomized Binary Neural Network Using Adiabatic Superconductor Josephson Devices.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
A Global Optimization Algorithm for Buffer and Splitter Insertion in Adiabatic Quantum-Flux-Parametron Circuits.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023
Performance Assessment of an Extremely Energy-Efficient Binary Neural Network Using Adiabatic Superconductor Devices.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023
2022
Adiabatic Quantum-Flux-Parametron with Delay-Line Clocking Using Square Excitation Currents.
IEICE Trans. Electron., 2022
A 16-Bit Parallel Prefix Carry Look-Ahead Kogge-Stone Adder Implemented in Adiabatic Quantum-Flux-Parametron Logic.
IEICE Trans. Electron., 2022
A High-Speed Interface Based on a Josephson Latching Driver for Adiabatic Quantum-Flux-Parametron Logic.
IEICE Trans. Electron., 2022
Low-Latency Adiabatic Quantum-Flux-Parametron Circuit Integrated With a Hybrid Serializer/Deserializer.
IEEE Access, 2022
Design and Implementation of Stochastic Neural Networks Using Superconductor Quantum-Flux-Parametron Devices.
Proceedings of the 35th IEEE International System-on-Chip Conference, 2022
Proceedings of the 61st IEEE Annual Conference of the Society of Instrument and Control Engineers, 2022
Proceedings of the 2022 International Conference on Robotics and Automation, 2022
A Study on the Efficient Design of Adders Using Adiabatic Quantum-Flux-Parametron Circuits.
Proceedings of the 11th IEEE Global Conference on Consumer Electronics, 2022
A Neural Network Processing Unit Using Adiabatic Quantum-Flux-Parametron Superconducting Technology.
Proceedings of the 11th IEEE Global Conference on Consumer Electronics, 2022
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
2021
MANA: A Monolithic Adiabatic iNtegration Architecture Microprocessor Using 1.4-zJ/op Unshunted Superconductor Josephson Junction Devices.
IEEE J. Solid State Circuits, 2021
Planarized Nb 4-Layer Fabrication Process for Superconducting Integrated Circuits and Its Fabricated Device Evaluation.
IEICE Trans. Electron., 2021
Adiabatic quantum-flux-parametron with delay-line clocking: logic gate demonstration and phase skipping operation.
CoRR, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
MANA: A Monolithic Adiabatic iNtegration Architecture Microprocessor using 1.4zJ/op Superconductor Josephson Junction Devices.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
2019
IEICE Trans. Electron., 2019
A Stochastic-Computing based Deep Learning Framework using Adiabatic Quantum-Flux-Parametron SuperconductingTechnology.
CoRR, 2019
Systematic method to evaluate energy dissipation in adiabatic quantum-flux-parametron logic.
CoRR, 2019
Advanced Direct Synthesis Approach for High Selectivity In-Line Topology Filters Comprising $N$ - 1 Adjacent Frequency-Variant Couplings.
IEEE Access, 2019
IDE Development, Logic Synthesis and Buffer/Splitter Insertion Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019
A stochastic-computing based deep learning framework using adiabatic quantum-flux-parametron superconducting technology.
Proceedings of the 46th International Symposium on Computer Architecture, 2019
A Buffer and Splitter Insertion Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019
A Majority Logic Synthesis Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
2018
Recent Progress on Reversible Quantum-Flux-Parametron for Superconductor Reversible Computing.
IEICE Trans. Electron., 2018
IEICE Trans. Electron., 2018
Combined Fault Detection, Isolation, and Control: Propulsion Controlled Aircraft in Case of Elevator Failure.
Proceedings of the IEEE Conference on Control Technology and Applications, 2018
2017
Proceedings of the 11th Asian Control Conference, 2017
2016
30GHz Operation of Single-Flux-Quantum Arithmetic Logic Unit Implemented by Using Dynamically Reconfigurable Gates.
IEICE Trans. Electron., 2016
IEICE Trans. Electron., 2016
Inductance and Current Distribution Extraction in Nb Multilayer Circuits with Superconductive and Resistive Components.
IEICE Trans. Electron., 2016
High-speed demonstration of low-power 1 k-bit shift-register memories using LR-biasing SFQ circuits.
IEICE Electron. Express, 2016
2015
50 GHz Demonstration of an Integer-Type Butterfly Processing Circuit for an FFT Processor Using the 10 kA/cm<sup>2</sup> Nb Process.
IEICE Trans. Electron., 2015
2014
Design and Evaluation of Magnetic Field Tolerant Single Flux Quantum Circuits for Superconductive Sensing Systems.
IEICE Trans. Electron., 2014
Design and Demonstration of a Single-Flux-Quantum Multi-Stop Time-to-Digital Converter for Time-of-Flight Mass Spectrometry.
IEICE Trans. Electron., 2014
Design and High-Speed Demonstration of Single-Flux-Quantum Bit-Serial Floating-Point Multipliers Using a 10kA/cm<sup>2</sup> Nb Process.
IEICE Trans. Electron., 2014
Nb 9-Layer Fabrication Process for Superconducting Large-Scale SFQ Circuits and Its Process Evaluation.
IEICE Trans. Electron., 2014
IEICE Trans. Electron., 2014
Large-Scale Integrated Circuit Design Based on a Nb Nine-Layer Structure for Reconfigurable Data-Path Processors.
IEICE Trans. Electron., 2014
Proceedings of the Reversible Computation - 6th International Conference, 2014
2010
100 GHz Demonstrations Based on the Single-Flux-Quantum Cell Library for the 10 kA/cm<sup>2</sup> Nb Multi-Layer Process.
IEICE Trans. Electron., 2010
Design and Implementation of RSFQ Microwave Choppers for the Superconducting Quantum-Computing System.
IEICE Trans. Electron., 2010
IEICE Trans. Electron., 2010
Access time measurement of 64-kb Josephson-CMOS hybrid memories using SFQ time-to-digital converter.
IEICE Electron. Express, 2010
2009
IEICE Electron. Express, 2009
2008
Proposal of a Desk-Side Supercomputer with Reconfigurable Data-Paths Using Rapid Single-Flux-Quantum Circuits.
IEICE Trans. Electron., 2008
Direct measurements of propagation delay of single-flux-quantum circuits by time-to-digital converters.
IEICE Electron. Express, 2008
Superconductive Single-Flux-Quantum Circuit/System Technology and 40Gb/s Switch System Demonstration.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
2005
IEICE Trans. Electron., 2005
2004