Sunil Shukla
Orcid: 0000-0002-9268-4096
According to our database1,
Sunil Shukla
authored at least 34 papers
between 2002 and 2023.
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Bibliography
2023
A Switched-Capacitor Integer Compute Unit with Decoupled Storage and Arithmetic for Cloud AI Inference in 5nm CMOS.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
2022
A 7-nm Four-Core Mixed-Precision AI Chip With 26.2-TFLOPS Hybrid-FP8 Training, 104.9-TOPS INT4 Inference, and Workload-Aware Throttling.
IEEE J. Solid State Circuits, 2022
Sensor based Smart Plant Monitoring using IOT and Deep Learning: A Systematic Approach.
Proceedings of the 7th International Conference on Computing, Communication and Security, 2022
2021
A 7nm 4-Core AI Chip with 25.6TFLOPS Hybrid FP8 Training, 102.4TOPS INT4 Inference and Workload-Aware Throttling.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021
2020
A 3.0 TFLOPS 0.62V Scalable Processor Core for High Compute Utilization AI Training and Inference.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
2018
A Scalable Multi- TeraOPS Deep Learning Processor Core for AI Trainina and Inference.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
Proceedings of the International Symposium on Low Power Electronics and Design, 2018
2017
Proceedings of the 54th Annual Design Automation Conference, 2017
2016
Proceedings of the IEEE International Conference on Rebooting Computing, 2016
2015
Proceedings of the 1st Summit on Advances in Programming Languages, 2015
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015
2014
Proceedings of the International Symposium on Memory Management, 2014
2013
ACM Trans. Embed. Comput. Syst., 2013
And then there were none: a stall-free real-time garbage collector for reconfigurable hardware.
Commun. ACM, 2013
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
2012
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
2011
Virtualization of heterogeneous machines hardware description in a synthesizable object-oriented language.
Proceedings of the 48th Design Automation Conference, 2011
2010
Proceedings of the 8th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2010), 2010
Proceedings of the Third Workshop on Experimental Linguistics, 2010
2008
QUKU: A Mixed Grain Dynamically Reconfigurable Architecture for High Performance Computing
PhD thesis, 2008
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008
2007
QUKU: A FPGA Based Flexible Coarse Grain Architecture Design Paradigm using Process Networks.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007
Improving High Quality TTS using Circular Linear Prediction and Constant Pitch Transform.
Proceedings of the IEEE International Conference on Acoustics, 2007
2006
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006
Proceedings of the Dynamically Reconfigurable Architectures, 02.04. - 07.04.2006, 2006
Proceedings of the Reconfigurable Computing: Architectures and Applications, 2006
2004
Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004
2002
Proceedings of the 10th IEEE International Workshop on Memory Technology, 2002
Circular LPC modeling and constant pitch transform for accurate speech analysis and high quality speech synthesis.
Proceedings of the IEEE International Conference on Acoustics, 2002