S. Sioncke

According to our database, S. Sioncke authored at least 3 papers between 2015 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2018

Impact of slow and fast oxide traps on In0.53Ga0.47As device operation studied using CET maps.

Vamsi Putcha, Jacopo Franco, Abhitosh Vais, Ben Kaczer, S. Sioncke, Dimitri Linten, Guido Groeseneken

Proceedings of the IEEE International Reliability Physics Symposium, 2018

2016

Beyond-Si materials and devices for more Moore and more than Moore applications.

Nadine Collaert, AliReza Alian, Hiroaki Arimura, Geert Boccardi, Geert Eneman, Jacopo Franco, Tsvetan Ivanov, Dennis Lin, Jérôme Mitard, S. Ramesh, R. Rooyackers, Marc Schaekers, A. Sibaya-Hernandez, S. Sioncke, Quentin Smets, Abhitosh Vais, A. Vandooren, Anabela Veloso, Anne S. Verhulst, Devin Verreck, Niamh Waldron, Amey Walke, Liesbeth Witters, H. Yu, X. Zhou, Aaron Voon-Yew Thean

Proceedings of the International Conference on IC Design and Technology, 2016

2015

The relationship between border traps characterized by AC admittance and BTI in III-V MOS devices.

Abhitosh Vais, Koen Martens, Jacopo Franco, Dennis Lin, AliReza Alian, Philippe Roussel, S. Sioncke, Nadine Collaert, Aaron Thean, Marc M. Heyns, Guido Groeseneken, Kristin De Meyer

Proceedings of the IEEE International Reliability Physics Symposium, 2015