Kristin De Meyer
According to our database1, Kristin De Meyer authored at least 11 papers between 1990 and 2015.
Legend:Book In proceedings Article PhD thesis Other
22.5 A 4×20Gb/s WDM ring-based hybrid CMOS silicon photonics transceiver.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
The relationship between border traps characterized by AC admittance and BTI in III-V MOS devices.
Proceedings of the IEEE International Reliability Physics Symposium, 2015
Lateral NWFET optimization for beyond 7nm nodes.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015
Low-Power, 10-Gbps 1.5-Vpp differential CMOS driver for a silicon electro-optic ring modulator.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012
An analytical compact model for estimation of stress in multiple Through-Silicon Via configurations.
Proceedings of the Design, Automation and Test in Europe, 2011
Impact of interface state trap density on the performance characteristics of different III-V MOSFET architectures.
Microelectronics Reliability, 2010
Measurement and Analysis of Parasitic Capacitance in FinFETs with High-k Dielectrics and Metal-Gate Stack.
Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009
3D Stacked IC demonstrator using Hybrid Collective Die-to-Wafer bonding with copper Through Silicon Vias (TSV).
Proceedings of the IEEE International Conference on 3D System Integration, 2009
Mechanism of O2-anneal induced Vfb shifts of Ru gated stacks.
Microelectronics Reliability, 2007
Modelling mobility degradation due to remote Coulomb scattering from dielectric charges and its impact on MOS device performance.
Microelectronics Reliability, 2005
Carrier transport modelling in the inversion layer of submicron semiconductor devices.
European Transactions on Telecommunications, 1990