Sang Joon Hwang

Affiliations:
  • Samsung Electronics, Hwasung, Korea
  • Korea University, Department of Electrical Engineering, Seoul, South Korea


According to our database1, Sang Joon Hwang authored at least 10 papers between 2005 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
DSAC: Low-Cost Rowhammer Mitigation Using In-DRAM Stochastic and Approximate Counting Algorithm.
CoRR, 2023

2022

2021
A Reflection and Crosstalk Canceling Continuous-Time Linear Equalizer for High-Speed DDR SDRAM.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

2008
An 80 nm 4 Gb/s/pin 32 bit 512 Mb GDDR4 Graphics DRAM With Low Power and Low Noise Data Bus Inversion.
IEEE J. Solid State Circuits, 2008

Design of Organic TFT Pixel Electrode Circuit for Active-Matrix OLED Displays.
J. Comput., 2008

A pre-emphasis output buffer control scheme for a GDDR3 SDRAM interface.
IEICE Electron. Express, 2008

2007

A New Organic Thin-Film Transistor Based Current-Driving Pixel Circuit for Active-Matrix Organic Light-Emitting Displays.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

2005
A 1.6-Gb/s/pin double data rate SDRAM with wave-pipelined CAS latency control.
IEEE J. Solid State Circuits, 2005

A Case Study in Distributed Locking Protocol on Linux Clusters.
Proceedings of the Computational Science, 2005


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