Seunghyun Moon
Orcid: 0000-0003-0027-2666
According to our database1,
Seunghyun Moon authored at least 20 papers
between 2018 and 2026.
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Bibliography
2026
PredLM: A Sparse Large Language Model Decoding Accelerator With Hardware-Efficient Zero-Activation Prediction.
IEEE Trans. Circuits Syst. II Express Briefs, June, 2026
T-REX: Hardware-Software Co-Optimized Transformer Accelerator With Reduced External Memory Access and Enhanced Hardware Utilization.
IEEE J. Solid State Circuits, January, 2026
PersASR: A 2.3-μJ/frame 96.8%-accurate TinyML Automatic Speech Recognition Processor with Data Augmentation-Driven Personalization in 16-nm FinFET.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2026
2025
DeltaTrack: Flow-Driven Multiple Object Tracking Accelerator With Variable LSB Approximation for Real-Time and Energy-Efficient Video Analytics.
IEEE Trans. Circuits Syst. II Express Briefs, December, 2025
CoRR, November, 2025
T-REX: A 68-567 μs/token, 0.41-3.95 μJ/token Transformer Accelerator with Reduced External Memory Access and Enhanced Hardware Utilization in 16nm FinFET.
CoRR, March, 2025
T-REX: A 68-to-567μs/Token 0.41-to-3.95μJ/Token Transformer Accelerator with Reduced External Memory Access and Enhanced Hardware Utilization in 16nm FinFET.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025
2024
Multipurpose Deep-Learning Accelerator for Arbitrary Quantization With Reduction of Storage, Logic, and Latency Waste.
IEEE J. Solid State Circuits, January, 2024
A 1-TFLOPS/W, 28-nm Deep Neural Network Accelerator Featuring Online Compression and Decompression and BF16 Digital In-Memory-Computing Hardware.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024
2023
Bottleneck-Stationary Compact Model Accelerator With Reduced Requirement on Memory Bandwidth for Edge Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2023
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
A 127.8TOPS/W Arbitrarily Quantized 1-to-8b Scalable-Precision Accelerator for General-Purpose Deep Learning with Reduction of Storage, Logic and Latency Waste.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023
2022
An 8.9-71.3 TOPS/W Deep Learning Accelerator for Arbitrarily Quantized Neural Networks.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
Configurable Energy-Efficient Lattice-Based Post-Quantum Cryptography Processor for IoT Devices.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
2021
Impact of Surface and Pore Characteristics on Fatigue Life of Laser Powder Bed Fusion Ti-6Al-4V Alloy Described by Neural Network Models.
CoRR, 2021
2019
A 512Gb 3-bit/Cell 3D 6<sup>th</sup>-Generation V-NAND Flash Memory with 82MB/s Write Throughput and 1.2Gb/s Interface.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
2018
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018