Shai Rotem

According to our database1, Shai Rotem authored at least 9 papers between 1998 and 2010.

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Bibliography

2010
TAO: two-level atomicity for dynamic binary optimizations.
Proceedings of the CGO 2010, 2010

2003
Relative timing [asynchronous design].
IEEE Trans. Very Large Scale Integr. Syst., 2003

2002
Coordinated transformations for high-level synthesis of high performance microprocessor blocks.
Proceedings of the 39th Design Automation Conference, 2002

2001
An asynchronous instruction length decoder.
IEEE J. Solid State Circuits, 2001

2000
CA-BIST for Asynchronous Circuits: A Case Study on the RAPPID Asynchronous Instruction Length Decoder.
Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000), 2000

1999
CAD Directions for High Performance Asynchronous Circuits.
Proceedings of the 36th Conference on Design Automation, 1999

Relative Timing.
Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '99), 1999

RAPPID: An Asynchronous Instruction Length Decoder.
Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '99), 1999

1998
Average-Case Optimized Technology Mapping of One-Hot Domino CircuitsAverage-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode Circuits.
Proceedings of the 4th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '98), 30 March, 1998


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