Kanishkan Vadivel
Orcid: 0000-0003-4186-9530
According to our database1,
Kanishkan Vadivel
authored at least 9 papers
between 2017 and 2022.
Collaborative distances:
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Bibliography
2022
Prebypass: Software Register File Bypassing for Reduced Interconnection Architectures.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022
SACA: System-level Analog CIM Accelerators Simulation Framework: Architecture and Cycle-accurate System-to-device Simulator.
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022
SACA: System-level Analog CIM Accelerators Simulation Framework: Accurate Simulation of Non-Ideal Components.
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022
2020
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2020
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2019
Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems, 2019
Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems, 2019
2017
Proceedings of the Euromicro Conference on Digital System Design, 2017