Konstantinos Kanellopoulos

According to our database, Konstantinos Kanellopoulos authored at least 30 papers between 2019 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2025

Revelator: Rapid Data Fetching via OS-Driven Hash-based Speculative Address Translation.

Konstantinos Kanellopoulos, Konstantinos Sgouras, Andreas Kosmas Kakolyris, Vlad-Petru Nitu, Berkin Kerim Konar, Rahul Bera, Onur Mutlu

CoRR, August, 2025

SAGe: A Lightweight Algorithm-Architecture Co-Design for Mitigating the Data Preparation Bottleneck in Large-Scale Genome Analysis.

Nika Mansouri-Ghiasi, Talu Güloglu, Harun Mustafa, Can Firtina, Konstantina Koliogeorgi, Konstantinos Kanellopoulos, Haiyu Mao, Rakesh Nadig, Mohammad Sadrosadati, Jisung Park, Onur Mutlu

CoRR, April, 2025

Revisiting Main Memory-Based Covert and Side Channel Attacks in the Context of Processing-in-Memory.

F. Nisa Bostanci, Konstantinos Kanellopoulos, Ataberk Olgun, A. Giray Yaglikçi, Ismail Emir Yüksel, Nika Mansouri-Ghiasi, Zülal Bingöl, Mohammad Sadrosadati, Onur Mutlu

Proceedings of the 55th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2025

Virtuoso: Enabling Fast and Accurate Virtual Memory Research via an Imitation-based Operating System Simulation Methodology.

Konstantinos Kanellopoulos, Konstantinos Sgouras, F. Nisa Bostanci, Andreas Kosmas Kakolyris, Berkin Kerim Konar, Rahul Bera, Mohammad Sadrosadati, Rakesh Kumar, Nandita Vijaykumar, Onur Mutlu

Proceedings of the 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2025

2024

EcoFlow: Efficient Convolutional Dataflows on Low-Power Neural Network Accelerators.

Lois Orosa, Skanda Koppula, Yaman Umuroglu, Konstantinos Kanellopoulos, Juan Gómez-Luna, Michaela Blott, Kees A. Vissers, Onur Mutlu

IEEE Trans. Computers, September, 2024

Leveraging Adversarial Detection to Enable Scalable and Low Overhead RowHammer Mitigations.

Oguzhan Canpolat, Abdullah Giray Yaglikçi, Ataberk Olgun, Ismail Emir Yüksel, Yahya Can Tugrul, Konstantinos Kanellopoulos, Oguz Ergin, Onur Mutlu

CoRR, 2024

Amplifying Main Memory-Based Timing Covert and Side Channels using Processing-in-Memory Operations.

Konstantinos Kanellopoulos, F. Nisa Bostanci, Ataberk Olgun, Abdullah Giray Yaglikçi, Ismail Emir Yuksel, Nika Mansouri-Ghiasi, Zülal Bingöl, Mohammad Sadrosadati, Onur Mutlu

CoRR, 2024

Virtuoso: An Open-Source, Comprehensive and Modular Simulation Framework for Virtual Memory Research.

Konstantinos Kanellopoulos, Konstantinos Sgouras, Onur Mutlu

CoRR, 2024

Address Scaling: Architectural Support for Fine-Grained Thread-Safe Metadata Management.

Deepanjali Mishra, Konstantinos Kanellopoulos, Ashish Panwar, Akshitha Sriraman, Vivek Seshadri, Onur Mutlu, Todd C. Mowry

IEEE Comput. Archit. Lett., 2024

BreakHammer: Enhancing RowHammer Mitigations by Carefully Throttling Suspect Threads.

Oguzhan Canpolat, A. Giray Yaglikçi, Ataberk Olgun, Ismail Emir Yuksel, Yahya Can Tugrul, Konstantinos Kanellopoulos, Oguz Ergin, Onur Mutlu

Proceedings of the 57th IEEE/ACM International Symposium on Microarchitecture, 2024

Constable: Improving Performance and Power Efficiency by Safely Eliminating Load Instruction Execution.

Rahul Bera, Adithya Ranganathan, Joydeep Rakshit, Sujit Mahto, Anant V. Nori, Jayesh Gaur, Ataberk Olgun, Konstantinos Kanellopoulos, Mohammad Sadrosadati, Sreenivas Subramoney, Onur Mutlu

Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024

CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low Cost.

F. Nisa Bostanci, Ismail Emir Yüksel, Ataberk Olgun, Konstantinos Kanellopoulos, Yahya Can Tugrul, A. Giray Yaglikçi, Mohammad Sadrosadati, Onur Mutlu

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024

2023

PiDRAM: A Holistic End-to-end FPGA-based Framework for Processing-in-DRAM.

Ataberk Olgun, Juan Gómez-Luna, Konstantinos Kanellopoulos, Behzad Salami, Hasan Hassan, Oguz Ergin, Onur Mutlu

ACM Trans. Archit. Code Optim., March, 2023

ALP: Alleviating CPU-Memory Data Movement Overheads in Memory-Centric Systems.

Nika Mansouri-Ghiasi, Nandita Vijaykumar, Geraldo F. Oliveira, Lois Orosa, Ivan Fernandez, Mohammad Sadrosadati, Konstantinos Kanellopoulos, Nastaran Hajinazar, Juan Gómez-Luna, Onur Mutlu

IEEE Trans. Emerg. Top. Comput., 2023

Victima: Drastically Increasing Address Translation Reach by Leveraging Underutilized Cache Resources.

Konstantinos Kanellopoulos, Hong Chul Nam, Nisa Bostanci, Rahul Bera, Mohammad Sadrosadati, Rakesh Kumar, Davide Basilio Bartolini, Onur Mutlu

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

Utopia: Fast and Efficient Address Translation via Hybrid Restrictive & Flexible Virtual-to-Physical Address Mappings.

Konstantinos Kanellopoulos, Rahul Bera, Kosta Stojiljkovic, F. Nisa Bostanci, Can Firtina, Rachata Ausavarungnirun, Rakesh Kumar, Nastaran Hajinazar, Mohammad Sadrosadati, Nandita Vijaykumar, Onur Mutlu

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

Evaluating Homomorphic Operations on a Real-World Processing-In-Memory System.

Harshita Gupta, Mayank Kabra, Juan Gómez-Luna, Konstantinos Kanellopoulos, Onur Mutlu

Proceedings of the IEEE International Symposium on Workload Characterization, 2023

2022

MetaSys: A Practical Open-source Metadata Management System to Implement and Evaluate Cross-layer Optimizations.

Nandita Vijaykumar, Ataberk Olgun, Konstantinos Kanellopoulos, F. Nisa Bostanci, Hasan Hassan, Mehrshad Lotfi, Phillip B. Gibbons, Onur Mutlu

ACM Trans. Archit. Code Optim., 2022

Utopia: Efficient Address Translation using Hybrid Virtual-to-Physical Address Mapping.

Konstantinos Kanellopoulos, Rahul Bera, Kosta Stojiljkovic, Can Firtina, Rachata Ausavarungnirun, Nastaran Hajinazar, Jisung Park, Nandita Vijaykumar, Onur Mutlu

CoRR, 2022

RevaMp3D: Architecting the Processor Core and Cache Hierarchy for Systems with Monolithically-Integrated Logic and Memory.

Nika Mansouri-Ghiasi, Mohammad Sadrosadati, Geraldo F. Oliveira, Konstantinos Kanellopoulos, Rachata Ausavarungnirun, Juan Gómez-Luna, Aditya Manglik, João Dinis Ferreira, Jeremie S. Kim, Christina Giannoula, Nandita Vijaykumar, Jisung Park, Onur Mutlu

CoRR, 2022

Hermes: Accelerating Long-Latency Load Requests via Perceptron-Based Off-Chip Load Prediction.

Rahul Bera, Konstantinos Kanellopoulos, Shankar Balachandran, David Novo, Ataberk Olgun, Mohammad Sadrosadati, Onur Mutlu

Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

PiDRAM: An FPGA-based Framework for End-to-end Evaluation of Processing-in-DRAM Techniques.

Ataberk Olgun, Juan Gómez-Luna, Konstantinos Kanellopoulos, Behzad Salami, Hasan Hassan, Oguz Ergin, Onur Mutlu

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

SeGraM: a universal hardware accelerator for genomic sequence-to-graph and sequence-to-sequence mapping.

Damla Senol Cali, Konstantinos Kanellopoulos, Joël Lindegger, Zülal Bingöl, Gurpreet S. Kalsi, Ziyi Zuo, Can Firtina, Meryem Banu Cavlak, Jeremie S. Kim, Nika Mansouri-Ghiasi, Gagandeep Singh, Juan Gómez-Luna, Nour Almadhoun Alserr, Mohammed Alser, Sreenivas Subramoney, Can Alkan, Saugata Ghose, Onur Mutlu

Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

2021

SISA: Set-Centric Instruction Set Architecture for Graph Mining on Processing-in-Memory Systems.

Maciej Besta, Raghavendra Kanakagiri, Grzegorz Kwasniewski, Rachata Ausavarungnirun, Jakub Beránek, Konstantinos Kanellopoulos, Kacper Janda, Zur Vonarburg-Shmaria, Lukas Gianinazzi, Ioana Stefan, Juan Gómez-Luna, Marcin Copik, Lukas Kapp-Schwoerer, Salvatore Di Girolamo, Marek Konieczny, Onur Mutlu, Torsten Hoefler

CoRR, 2021

SISA: Set-Centric Instruction Set Architecture for Graph Mining on Processing-in-Memory Systems.

Maciej Besta, Raghavendra Kanakagiri, Grzegorz Kwasniewski, Rachata Ausavarungnirun, Jakub Beránek, Konstantinos Kanellopoulos, Kacper Janda, Zur Vonarburg-Shmaria, Lukas Gianinazzi, Ioana Stefan, Juan Gómez-Luna, Jakub Golinowski, Marcin Copik, Lukas Kapp-Schwoerer, Salvatore Di Girolamo, Nils Blach, Marek Konieczny, Onur Mutlu, Torsten Hoefler

Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning.

Rahul Bera, Konstantinos Kanellopoulos, Anant Nori, Taha Shahroodi, Sreenivas Subramoney, Onur Mutlu

Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows.

Abdullah Giray Yaglikçi, Minesh Patel, Jeremie S. Kim, Roknoddin Azizi, Ataberk Olgun, Lois Orosa, Hasan Hassan, Jisung Park, Konstantinos Kanellopoulos, Taha Shahroodi, Saugata Ghose, Onur Mutlu

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

2020

The Virtual Block Interface: A Flexible Alternative to the Conventional Virtual Memory Framework.

Nastaran Hajinazar, Pratyush Patel, Minesh Patel, Konstantinos Kanellopoulos, Saugata Ghose, Rachata Ausavarungnirun, Geraldo F. Oliveira, Jonathan Appavoo, Vivek Seshadri, Onur Mutlu

Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

2019

EDEN: Enabling Energy-Efficient, High-Performance Deep Neural Network Inference Using Approximate DRAM.

Skanda Koppula, Lois Orosa, Abdullah Giray Yaglikçi, Roknoddin Azizi, Taha Shahroodi, Konstantinos Kanellopoulos, Onur Mutlu

Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

SMASH: Co-designing Software Compression and Hardware-Accelerated Indexing for Efficient Sparse Matrix Operations.

Konstantinos Kanellopoulos, Nandita Vijaykumar, Christina Giannoula, Roknoddin Azizi, Skanda Koppula, Nika Mansouri-Ghiasi, Taha Shahroodi, Juan Gómez-Luna, Onur Mutlu

Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019