Lei Ju

Orcid: 0000-0001-6186-5399

Affiliations:

Shandong University, School of Cyber Science and Technology, Key Laboratory of Cryptologic Technology and Information Security, Qingdao, China
Shandong University, School of Computer Science and Technology, Jinan, China
National University of Singapore, School of Computing, Singapore (PhD 2010)

According to our database¹, Lei Ju authored at least 100 papers between 2007 and 2024.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

Legend:

Book

In proceedings

Article

PhD thesis

Dataset

Other

Bibliography

2024

POSTER: Accelerating High-Precision Integer Multiplication used in Cryptosystems with GPUs.

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[DOI]

Proceedings of the 29th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming, 2024

Accelerating Multi-Scalar Multiplication for Efficient Zero Knowledge Proofs with Multi-GPU Systems.

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[DOI]

Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

2023

ChainKV: A Semantics-Aware Key-Value Store for Ethereum System.

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[DOI]

Proc. ACM Manag. Data, December, 2023

Towards the transferable audio adversarial attack via ensemble methods.

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[DOI]

Cybersecur., December, 2023

Towards the universal defense for query-based audio adversarial attacks on speech recognition system.

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[DOI]

Cybersecur., December, 2023

Multi-Party Sequential Data Publishing Under Differential Privacy.

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[DOI]

IEEE Trans. Knowl. Data Eng., September, 2023

Optimizing Worst Case Data Freshness in RF-Powered Networked Embedded Systems.

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[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2023

Adaptive Task-Based Intermittent Computing System With Parallel State Backup.

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[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2023

A Comprehensive Memory Management Framework for CPU-FPGA Heterogenous SoCs.

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[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2023

AVA: Inconspicuous Attribute Variation-based Adversarial Attack bypassing DeepFake Detection.

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[DOI]

CoRR, 2023

Towards the Universal Defense for Query-Based Audio Adversarial Attacks.

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[DOI]

CoRR, 2023

Runtime Row/Column Activation Pruning for ReRAM-based Processing-in-Memory DNN Accelerators.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

FxHENN: FPGA-based acceleration framework for homomorphic encrypted CNN inference.

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[DOI]

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

Work or Sleep: Freshness-Aware Energy Scheduling for Wireless Powered Communication Networks with Interference Consideration.

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[DOI]

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Accelerating DNN Inference with Heterogeneous Multi-DPU Engines.

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[DOI]

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022

Re-LSM: A ReRAM-Based Processing-in-Memory Framework for LSM-Based Key-Value Store.

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[DOI]

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

coxHE: A software-hardware co-design framework for FPGA acceleration of homomorphic computation.

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[DOI]

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

Precise and scalable shared cache contention analysis for WCET estimation.

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[DOI]

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021

Differentially Private Publication of Multi-Party Sequential Data.

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[DOI]

Proceedings of the 37th IEEE International Conference on Data Engineering, 2021

2020

Applying Multiple Level Cell to Non-volatile FPGAs.

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[DOI]

ACM Trans. Embed. Comput. Syst., 2020

Scope-Aware Useful Cache Block Calculation for Cache-Related Pre-Emption Delay Analysis With Set-Associative Data Caches.

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[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2019

EMC: Energy-Aware Morphable Cache Design for Non-Volatile Processors.

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[DOI]

IEEE Trans. Computers, 2019

Dynamically Reconfigurable Architecture for High-Throughput Hash Function in Key-Value Store.

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[DOI]

Proceedings of the 21st IEEE International Conference on High Performance Computing and Communications; 17th IEEE International Conference on Smart City; 5th IEEE International Conference on Data Science and Systems, 2019

Automatic data placement for CPU-FPGA heterogeneous multiprocessor System-on-Chips.

[BibT_eX]

[DOI]

Shiqing Li

Yixun Wei

Lei Ju

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018

Shared Last-Level Cache Management and Memory Scheduling for GPGPUs with Hybrid Main Memory.

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[DOI]

ACM Trans. Embed. Comput. Syst., 2018

Analyzing Data Cache Related Preemption Delay With Multiple Preemptions.

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[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

NVM-Based FPGA Block RAM With Adaptive SLC-MLC Conversion.

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[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Position prediction system based on spatio-temporal regularity of object mobility.

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[DOI]

Inf. Syst., 2018

Set variation-aware shared LLC management for CPU-GPU heterogeneous architecture.

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Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

SLA-aware energy-efficient scheduling scheme for Hadoop YARN.

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[DOI]

J. Supercomput., 2017

Memory-Aware Embedded Control Systems Design.

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[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Energy-aware morphable cache management for self-powered non-volatile processors.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2017

Scope-Aware Useful Cache Block Analysis for Data Cache Related Preemption Delay.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE Real-Time and Embedded Technology and Applications Symposium, 2017

Runtime and reconfiguration dual-aware placement for SRAM-NVM hybrid FPGAs.

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[DOI]

Proceedings of the IEEE 6th Non-Volatile Memory Systems and Applications Symposium, 2017

Unified nvTCAM and sTCAM architecture for improving packet matching performance.

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[DOI]

Proceedings of the 18th ACM SIGPLAN/SIGBED Conference on Languages, 2017

Design Exploration for Multiple Level Cell Based Non-Volatile FPGAs.

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[DOI]

Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Time Mode Based Next Position Prediction System.

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[DOI]

Proceedings of the 19th IEEE International Conference on High Performance Computing and Communications; 15th IEEE International Conference on Smart City; 3rd IEEE International Conference on Data Science and Systems, 2017

An Implementation of Number Plate Recognition without Segmentation Using Convolutional Neural Network.

[BibT_eX]

[DOI]

Shared last-level cache management for GPGPUs with hybrid main memory.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Maximizing Forward Progress with Cache-aware Backup for Self-powered Non-volatile Processors.

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[DOI]

Proceedings of the 54th Annual Design Automation Conference, 2017

Cooperative DVFS for energy-efficient HEVC decoding on embedded CPU-GPU architecture.

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[DOI]

Proceedings of the 54th Annual Design Automation Conference, 2017

2016

Energy Efficient Real-Time Task Scheduling for Embedded Systems with Hybrid Main Memory.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2016

Data aggregation framework for energy-efficient WirelessHART networks.

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[DOI]

Feng Li

Lei Ju

Zhiping Jia

J. Syst. Archit., 2016

Energy efficient task allocation for hybrid main memory architecture.

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[DOI]

J. Syst. Archit., 2016

Clustering-Based Data Aggregation and Routing for Real-Time WirelessHART Communication.

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[DOI]

Proceedings of the Challenges and Opportunity with Big Data, 2016

A Novel Page Caching Policy for PCM and DRAM of Hybrid Memory Architecture.

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[DOI]

Proceedings of the 13th International Conference on Embedded Software and Systems, 2016

Energy Efficient Routing Algorithm Using Software Defining Network for WSNs via Unequal Clustering.

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[DOI]

Proceedings of the Geo-Spatial Knowledge and Intelligence, 2016

Unified DRAM and NVM hybrid buffer cache architecture for reducing journaling overhead.

[BibT_eX]

[DOI]

Zhiyong Zhang

Lei Ju

Zhiping Jia

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Write-back aware shared last-level cache management for hybrid main memory.

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[DOI]

Proceedings of the 53rd Annual Design Automation Conference, 2016

2015

Instruction Cache Locking Using Temporal Reuse Profile.

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[DOI]

Yun Liang

Tulika Mitra

Lei Ju

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Enhance Internet Access Ability for Ad Hoc Network with On-Demand Gateway Broadcast Strategy.

[BibT_eX]

[DOI]

Huaqiang Xu

Lei Ju

Zhiping Jia

Int. J. Wirel. Inf. Networks, 2015

A Novel OpenFlow-Based DDoS Flooding Attack Detection and Response Mechanism in Software-Defined Networking.

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[DOI]

Int. J. Inf. Secur. Priv., 2015

Gateway pheromone-based adaptive internet access scheme for mobile ad hoc networks.

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Int. J. Ad Hoc Ubiquitous Comput., 2015

An Entropy-Based Distributed DDoS Detection Mechanism in Software-Defined Networking.

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[DOI]

Rui Wang

Zhiping Jia

Lei Ju

Proceedings of the 2015 IEEE TrustCom/BigDataSE/ISPA, 2015

Hybrid scratchpad and cache memory management for energy-efficient parallel HEVC encoding.

[BibT_eX]

[DOI]

Chang Song

Lei Ju

Zhiping Jia

Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

Reducing Journaling Overhead with Hybrid Buffer Cache.

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[DOI]

Zhiyong Zhang

Lei Ju

Zhiping Jia

Proceedings of the Algorithms and Architectures for Parallel Processing, 2015

AIMR: An Adaptive Page Management Policy for Hybrid Memory Architecture with NVM and DRAM.

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[DOI]

Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

A Novel Memory Block Management Scheme for PCM Using WOM-Code.

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[DOI]

Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

Superframe Scheduling for Data Aggregation in WirelessHART Networks.

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[DOI]

Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

SLA-Aware Energy-Efficient Scheduling Scheme for Hadoop YARN.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

Minimizing Update Bits of NVM-Based Main Memory Using Bit Flipping and Cyclic Shifting.

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[DOI]

Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

Managing hybrid on-chip scratchpad and cache memories for multi-tasking embedded systems.

[BibT_eX]

[DOI]

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

Approximation-aware scheduling on heterogeneous multi-core architectures.

[BibT_eX]

[DOI]

Cheng Tan

Thannirmalai Somu Muthukaruppan

Tulika Mitra

Lei Ju

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

A three-stage-write scheme with flip-bit for PCM main memory.

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[DOI]

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014

A real-time flash translation layer via adaptive partial garbage collection.

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[DOI]

Int. J. Embed. Syst., 2014

High Performance FPGA Implementation of Elliptic Curve Cryptography over Binary Fields.

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Proceedings of the 13th IEEE International Conference on Trust, 2014

A High-Performance Distributed Certificate Revocation Scheme for Mobile Ad Hoc Networks.

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[DOI]

Proceedings of the 13th IEEE International Conference on Trust, 2014

On-demand gateway broadcast scheme for connecting mobile ad hoc networks to the Internet.

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[DOI]

Proceedings of the International Conference on Smart Computing, 2014

Reliable and Energy Efficient Routing Algorithm for WirelessHART.

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[DOI]

Proceedings of the Algorithms and Architectures for Parallel Processing, 2014

An Improved Energy-Efficient Scheduling for Precedence Constrained Tasks in Multiprocessor Clusters.

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[DOI]

Proceedings of the Algorithms and Architectures for Parallel Processing, 2014

Fast and Accurate Code Placement of Embedded Software for Hybrid On-Chip Memory Architecture.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE International Conference on High Performance Computing and Communications, 2014

SRFTL: An Adaptive Superblock-Based Real-Time Flash Translation Layer for NAND Flash Memory.

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[DOI]

Proceedings of the 2014 IEEE International Conference on High Performance Computing and Communications, 2014

Double Circulation Wear Leveling for PCM-Based Embedded Systems.

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[DOI]

Proceedings of the Advanced Computer Architecture - 10th Annual Conference, 2014

2013

Impact of trust model on on-demand multi-path routing in mobile ad hoc networks.

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Comput. Commun., 2013

Trust prediction and trust-based source routing in mobile ad hoc networks.

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Ad Hoc Networks, 2013

Context-Aware Routing Algorithm for WSNs Based on Unequal Clustering.

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[DOI]

Proceedings of the 12th IEEE International Conference on Trust, 2013

Dependency-Based Energy-Efficient Scheduling for Homogeneous Multi-core Clusters.

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[DOI]

Proceedings of the 12th IEEE International Conference on Trust, 2013

TimSim: A Timestep-Based Wireless Ad-Hoc Network Simulator.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International Conference on Trust, 2013

Normal Vector Based Fault-Tolerant Event Boundary Detection in Wireless Sensor Networks.

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[DOI]

Proceedings of the 12th IEEE International Conference on Trust, 2013

Light-Weight Trust-Based On-Demand Multipath Routing Protocol for Mobile Ad Hoc Networks.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International Conference on Trust, 2013

Thermal-Aware On-Chip Memory Architecture Exploration.

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[DOI]

Proceedings of the 12th IEEE International Conference on Trust, 2013

Multivalued Trust Routing Based on Topology Level for Wireless Sensor Networks.

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[DOI]

Proceedings of the 12th IEEE International Conference on Trust, 2013

Data Allocation for Embedded Systems with Hybrid On-Chip Scratchpad and Caches.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE International Conference on High Performance Computing and Communications & 2013 IEEE International Conference on Embedded and Ubiquitous Computing, 2013

Slack-Time-Aware Energy Efficient Scheduling for Multiprocessor SoCs.

[BibT_eX]

[DOI]

Xin Li

Zhiping Jia

Lei Ju

Proceedings of the 10th IEEE International Conference on High Performance Computing and Communications & 2013 IEEE International Conference on Embedded and Ubiquitous Computing, 2013

Binarization based implementation for real-time human detection.

[BibT_eX]

[DOI]

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Binarization-Based Human Detection for Compact FPGA Implementation.

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Proceedings of the Advanced Parallel Processing Technologies, 2013

2012

Performance debugging of Esterel specifications.

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[DOI]

Real Time Syst., 2012

The Research and Application of a Specific Instruction Processor for SMS4.

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Proceedings of the 11th IEEE International Conference on Trust, 2012

Tenant Onboarding in Evolving Multi-tenant Software-as-a-Service Systems.

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[DOI]

Lei Ju

Bikram Sengupta

Abhik Roychoudhury

Proceedings of the 2012 IEEE 19th International Conference on Web Services, 2012

Energy Efficient Routing Algorithm for WSNs via Unequal Clustering.

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[DOI]

Proceedings of the 14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, 2012

ASIP-based Design and Implementation of RSA for Embedded Systems.

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[DOI]

Proceedings of the 14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, 2012

2011

Trust management model for mobile ad hoc network based on analytic hierarchy process and fuzzy theory.

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[DOI]

IET Wirel. Sens. Syst., 2011

Multicast Trusted Routing with QoS Multi-constraints in Wireless Ad Hoc Networks.

[BibT_eX]

[DOI]