Liang Shi

Orcid: 0000-0002-9977-529X

Affiliations:
  • East China Normal University, Shanghai, China


According to our database1, Liang Shi authored at least 151 papers between 2010 and 2025.

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Bibliography

2025
Prophet: SSD Failure Analysis and Prediction Guided by Flash Reliability Characteristics in Data Centers.
IEEE Trans. Computers, August, 2025

Revisiting Multiple ECC on High-Density NAND Flash memory.
IEEE Trans. Very Large Scale Integr. Syst., June, 2025

Freezing-based Memory and Process Co-design for User Experience on Resource-limited Mobile Devices.
ACM Trans. Comput. Syst., 2025

Breathing new life into compression: Resolving the dilemma of LFS with compression on flash storage.
J. Syst. Archit., 2025

PMR: Fast Application Response via Parallel Memory Reclaim on Mobile Devices.
Proceedings of the 2025 USENIX Annual Technical Conference, 2025

ConZone: A Zoned Flash Storage Emulator for Consumer Devices.
Proceedings of the Design, Automation & Test in Europe Conference, 2025

Simplifying and Accelerating NOR Flash I/O Stack for RAM-Restricted Microcontrollers.
Proceedings of the 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2025

DISS: A Novel Data Invalidation Scheme for Swap-Data on Flash Storage Systems.
Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

2024
MTPS: A Multi-Task Perceiving and Scheduling Framework Across Multiple Mobile Devices.
IEEE Trans. Mob. Comput., December, 2024

Access Characteristic-Guided Remote Swapping Across Mobile Devices.
ACM Trans. Archit. Code Optim., December, 2024

Introduction to Special Issue on In/Near Memory and Storage Computing for Embedded Systems.
ACM Trans. Embed. Comput. Syst., November, 2024

Revisiting TRIM on High-Density Flash-Based Hybrid Storage Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2024

EEPC: Energy-Efficient Persistent Cache Scheme for Mobile Distributed File Systems.
IEEE Internet Things J., May, 2024

Critical Data Backup with Hybrid Flash-Based Consumer Devices.
ACM Trans. Archit. Code Optim., March, 2024

Flexible and Efficient Memory Swapping Across Mobile Devices With LegoSwap.
IEEE Trans. Parallel Distributed Syst., January, 2024

ProtFe: Low-Cost Secure Power Side-Channel Protection for General and Custom FeFET-Based Memories.
ACM Trans. Design Autom. Electr. Syst., January, 2024

Adaptive Differential Wearing for Read Performance Optimization on High-Density nand Flash Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2024

Hook: A Pattern Locality Guided Prefetch with Enhanced Read Performance for Hybrid SSDs.
Proceedings of the 13th Non-Volatile Memory Systems and Applications Symposium, 2024

Eliminate Critical Fragmentation of F2FS in Mobile Devices with Controller Co-Design.
Proceedings of the 13th Non-Volatile Memory Systems and Applications Symposium, 2024

Zoned-WB: WriteBooster Design with Zoned Storage for User Experience on Smartphones.
Proceedings of the International Conference on Networking, Architecture and Storage, 2024

CacheTrimmer: Adaptive Cache File Trimming for Optimized Performance and Lifetime on Mobile Devices.
Proceedings of the 42nd IEEE International Conference on Computer Design, 2024

CPF: A Cross-Layer Prefetching Framework for High-Density Flash-Based Storage.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

ElasticZRAM: Revisiting ZRAM for Swapping on Mobile Devices.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023
Access Characteristic Guided Partition for Nand Flash-Based High-Density SSDs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023

IOSR: Improving I/O Efficiency for Memory Swapping on Mobile Devices Via Scheduling and Reshaping.
ACM Trans. Embed. Comput. Syst., October, 2023

Optimizing Data Placement for Hybrid SRAM+Racetrack Memory SPM in Embedded Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2023

Performance and reliability optimization for high-density flash-based hybrid SSDs.
J. Syst. Archit., March, 2023

Fe-GCN: A 3D FeFET Memory Based PIM Accelerator for Graph Convolutional Networks.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023

Design Exploration of Dynamic Multi-Level Ternary Content-Addressable Memory Using Nanoelectromechanical Relays.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023

MGC: Multiple-Gray-Code for 3D NAND Flash based High-Density SSDs.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

When F2FS Meets Compression-Based SSD!
Proceedings of the 15th ACM/USENIX Workshop on Hot Topics in Storage and File Systems, 2023

ICE: Collaborating Memory and Process Management for User Experience on Resource-limited Mobile Devices.
Proceedings of the Eighteenth European Conference on Computer Systems, 2023

DECC: Differential ECC for Read Performance Optimization on High-Density NAND Flash Memory.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022
Practical optimizations for lightweight distributed file system on consumer devices.
CCF Trans. High Perform. Comput., December, 2022

Editorial for the special issue on memory architectures and systems for modern applications.
CCF Trans. High Perform. Comput., December, 2022

Reprogramming 3D TLC Flash Memory based Solid State Drives.
ACM Trans. Storage, 2022

Tail Latency Optimization for LDPC-Based High-Density and Low-Cost Flash Memory Devices.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Read latency variation aware performance optimization on high-density NAND flash based storage systems.
CCF Trans. High Perform. Comput., 2022

Access Characteristic Guided Remote Swapping for User Experience Optimization on Mobile Devices.
Proceedings of the IEEE Smartworld, 2022

HNFFS: Revisiting the NOR Flash File System.
Proceedings of the 11th IEEE Non-Volatile Memory Systems and Applications Symposium, 2022

Latency Aware Page Migration for Read Performance Optimization on Hybrid SSDs.
Proceedings of the 11th IEEE Non-Volatile Memory Systems and Applications Symposium, 2022

DWR: Differential Wearing for Read Performance Optimization on High-Density NAND Flash Memory.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

CDB: critical data backup design for consumer devices with high-density flash based hybrid storage.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
iTRIM: I/O-Aware TRIM for Improving User Experience on Mobile Devices.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Read-Ahead Efficiency on Mobile Devices: Observation, Characterization, and Optimization.
IEEE Trans. Computers, 2021

An Empirical Study of NVM-based File System.
Proceedings of the 10th IEEE Non-Volatile Memory Systems and Applications Symposium, 2021

Understanding and Optimizing Hybrid SSD with High-Density and Low-Cost Flash Memory.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021

Dynamic File Cache Optimization for Hybrid SSDs with High-Density and Low-Cost Flash Memory.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021

Relaxed Placement: Minimizing Shift Operations for Racetrack Memory in Hybrid SPM.
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

SFP: Smart File-Aware Prefetching for Flash based Storage Systems.
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

Pattern-Guided File Compression with User-Experience Enhancement for Log-Structured File System on Mobile Devices.
Proceedings of the 19th USENIX Conference on File and Storage Technologies, 2021

MobileSwap: Cross-Device Memory Swapping for Mobile Devices.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

SAC: A Stream Aware Write Cache Scheme for Multi-Streamed Solid State Drives.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020
Process Variation Aware Read Performance Improvement for LDPC-Based nand Flash Memory.
IEEE Trans. Reliab., 2020

Boosting the Performance of SSDs via Fully Exploiting the Plane Level Parallelism.
IEEE Trans. Parallel Distributed Syst., 2020

Inspection and Characterization of App File Usage in Mobile Devices.
ACM Trans. Storage, 2020

SEAL: User Experience-Aware Two-Level Swap for Mobile Devices.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Aging Capacitor Supported Cache Management Scheme for Solid-State Drives.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Maximizing I/O Throughput and Minimizing Performance Variation via Reinforcement Learning Based I/O Merging for SSDs.
IEEE Trans. Computers, 2020

Exploiting Asymmetric Errors for LDPC Decoding Optimization on 3D NAND Flash Memory.
IEEE Trans. Computers, 2020

Leveraging partial-refresh for performance and lifetime improvement of 3D NAND flash memory in cyber-physical systems.
J. Syst. Archit., 2020

Acclaim: Adaptive Memory Reclaim to Improve User Experience in Android Systems.
Proceedings of the 2020 USENIX Annual Technical Conference, 2020

Architectural Exploration on Racetrack Memories.
Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020

A Zero-Energy Consumption Scheme for System Suspend to Limited NVM.
Proceedings of the 9th Non-Volatile Memory Systems and Applications Symposium, 2020

Shaving Retries with Sentinels for Fast Read over High-Density 3D Flash.
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

Optimizing Data Placement for Hybrid SPM with SRAM and Racetrack Memory.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020

An Empirical Study of Hybrid SSD with Optane and QLC Flash.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020

Latency Variation Aware Read Performance Optimization on 3D High Density NAND Flash Memory.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

Access Characteristic Guided Partition for Read Performance Improvement on Solid State Drives.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
File Fragmentation in Mobile Devices: Measurement, Evaluation, and Treatment.
IEEE Trans. Mob. Comput., 2019

Minimizing Retention Induced Refresh Through Exploiting Process Variation of Flash Memory.
IEEE Trans. Computers, 2019

Boosting read-ahead efficiency for improved user experience on mobile devices.
SIGBED Rev., 2019

Optimizing fragmentation and segment cleaning for CPS based storage devices.
Proceedings of the 34th ACM/SIGAPP Symposium on Applied Computing, 2019

Fair Down to the Device: A GC-Aware Fair Scheduler for SSD.
Proceedings of the 2019 IEEE Non-Volatile Memory Systems and Applications Symposium, 2019

Optimizing Tail Latency of LDPC based Flash Memory Storage Systems Via Smart Refresh.
Proceedings of the 2019 IEEE International Conference on Networking, 2019

Parallel all the time: Plane Level Parallelism Exploration for High Performance SSDs.
Proceedings of the 35th Symposium on Mass Storage Systems and Technologies, 2019

Constructing Large, Durable and Fast SSD System via Reprogramming 3D TLC Flash Memory.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

1+1>2: variation-aware lifetime enhancement for embedded 3D NAND flash systems.
Proceedings of the 20th ACM SIGPLAN/SIGBED International Conference on Languages, 2019

Sentinel Cells Enabled Fast Read for NAND Flash.
Proceedings of the 11th USENIX Workshop on Hot Topics in Storage and File Systems, 2019

Leveraging Approximate Data for Robust Flash Storage.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018
Write Energy Reduction for PCM via Pumping Efficiency Improvement.
ACM Trans. Storage, 2018

Exploiting Chip Idleness for Minimizing Garbage Collection - Induced Chip Access Conflict on SSDs.
ACM Trans. Design Autom. Electr. Syst., 2018

Potential Trigger Detection for Hardware Trojans.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

An I/O Scheduling Strategy for Embedded Flash Storage Devices With Mapping Cache.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Exploiting Parallelism for Access Conflict Minimization in Flash-Based Solid State Drives.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

ApproxFTL: On the Performance and Lifetime Improvement of 3-D NAND Flash-Based SSDs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Access Characteristic Guided Read and Write Regulation on Flash Based Storage Systems.
IEEE Trans. Computers, 2018

F2FS Aware Mapping Cache Design on Solid State Drives.
Proceedings of the IEEE 7th Non-Volatile Memory Systems and Applications Symposium, 2018

Selective Compression Scheme for Read Performance Improvement on Flash Devices.
Proceedings of the 36th IEEE International Conference on Computer Design, 2018

An Efficient Cache Management Scheme for Capacitor Equipped Solid State Drives.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

Loss is Gain: Shortening Data for Lifetime Improvement on Low-Cost ECC Enabled Consumer-Level Flash Memory.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

Revisiting wear leveling design on compression applied 3D NAND flash memory: work-in-progress.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2018

Energy, latency, and lifetime improvements in MLC NVM with enhanced WOM code.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017
Lightweight Data Compression for Mobile Flash Storage.
ACM Trans. Embed. Comput. Syst., 2017

Asymmetric Error Rates of Cell States Exploration for Performance Improvement on Flash Memory Based Storage Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Towards trustworthy storage using SSDs with proprietary FTL.
Microprocess. Microsystems, 2017

Improving File System Performance of Mobile Storage Systems Using a Decoupled Defragmenter.
Proceedings of the 2017 USENIX Annual Technical Conference, 2017

An empirical study of F2FS on mobile devices.
Proceedings of the 23rd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2017

Improving read performance via selective Vpass reduction on high density 3D NAND flash memory.
Proceedings of the IEEE 6th Non-Volatile Memory Systems and Applications Symposium, 2017

Exploiting Process Variation for Read Performance Improvement on LDPC Based Flash Memory Storage Systems.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Reducing LDPC Soft Sensing Latency by Lightweight Data Refresh for Flash Read Performance Improvement.
Proceedings of the 54th Annual Design Automation Conference, 2017

A PV aware data placement scheme for read performance improvement on LDPC based flash memory: work-in-progress.
Proceedings of the Twelfth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis Companion, 2017

Improving LDPC performance via asymmetric sensing level placement on flash memory.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016
PUMA: From Simultaneous to Parallel for Shared Memory System in Multi-core.
J. Signal Process. Syst., 2016

Exploiting Process Variation for Write Performance Improvement on NAND Flash Memory Storage Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Retention Trimming for Lifetime Improvement of Flash Memory Storage Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

A New Design of In-Memory File System Based on File Virtual Address Framework.
IEEE Trans. Computers, 2016

Write reconstruction for write throughput improvement on MLC PCM based main memory.
J. Syst. Archit., 2016

Dynamic merging/splitting for better responsiveness in mobile devices.
Proceedings of the 5th Non-Volatile Memory Systems and Applications Symposium, 2016

Minimizing cell-to-cell interference by exploiting differential bit impact characteristics of scaled MLC NAND flash memories.
Proceedings of the 5th Non-Volatile Memory Systems and Applications Symposium, 2016

An Empirical Study of File-System Fragmentation in Mobile Storage Systems.
Proceedings of the 8th USENIX Workshop on Hot Topics in Storage and File Systems, 2016

Access Characteristic Guided Read and Write Cost Regulation for Performance Improvement on Flash Memory.
Proceedings of the 14th USENIX Conference on File and Storage Technologies, 2016

I/O scheduling with mapping cache awareness for flash based storage systems.
Proceedings of the 2016 International Conference on Embedded Software, 2016

Exploiting process variation for retention induced refresh minimization on flash memory.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Two-step state transition minimization for lifetime and performance improvement on MLC STT-RAM.
Proceedings of the 53rd Annual Design Automation Conference, 2016

Peak-to-average pumping efficiency improvement for charge pump in Phase Change Memories.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015
Wear Relief for High-Density Phase Change Memory Through Cell Morphing Considering Process Variation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Compiler-Assisted Refresh Minimization for Volatile STT-RAM Cache.
IEEE Trans. Computers, 2015

Designing an efficient persistent in-memory file system.
Proceedings of the IEEE Non-Volatile Memory System and Applications Symposium, 2015

Improving MLC PCM write throughput by write reconstruction.
Proceedings of the IEEE Non-Volatile Memory System and Applications Symposium, 2015

Maximizing IO performance via conflict reduction for flash memory storage systems.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Towards trustable storage using SSDs with proprietary FTL.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014
A Unified Write Buffer Cache Management Scheme for Flash Memory.
IEEE Trans. Very Large Scale Integr. Syst., 2014

Compiler-Assisted STT-RAM-Based Hybrid Cache for Energy Efficient Embedded Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2014

WCET-Aware Re-Scheduling Register Allocation for Real-Time Embedded Systems With Clustered VLIW Architecture.
IEEE Trans. Very Large Scale Integr. Syst., 2014

Thread Progress Aware Coherence Adaption for Hybrid Cache Coherence Protocols.
IEEE Trans. Parallel Distributed Syst., 2014

Error Model Guided Joint Performance and Endurance Optimization for Flash Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Dual partitioning multicasting for high-performance on-chip networks.
J. Parallel Distributed Comput., 2014

PUMA: Pseudo unified memory architecture for single-ISA heterogeneous multi-core systems.
Proceedings of the 2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications, 2014

Exploiting parallelism in I/O scheduling for access conflict minimization in flash-based solid state drives.
Proceedings of the IEEE 30th Symposium on Mass Storage Systems and Technologies, 2014

Combine thread with memory scheduling for maximizing performance in multi-core systems.
Proceedings of the 20th IEEE International Conference on Parallel and Distributed Systems, 2014

Leveling to the last mile: Near-zero-cost bit level wear leveling for PCM-based main memory.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

Exploit asymmetric error rates of cell states to improve the performance of flash memory storage systems.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

Retention Trimming for Wear Reduction of Flash Memory Storage Systems.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

High-Level Synthesis for Run-Time Hardware Trojan Detection and Recovery.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Instruction Extension and Generation for Adaptive Processors.
Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014

2013
Task Allocation on Nonvolatile-Memory-Based Hybrid Main Memory.
IEEE Trans. Very Large Scale Integr. Syst., 2013

Cooperating Virtual Memory and Write Buffer Management for Flash-Based Storage Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2013

Low-energy volatile STT-RAM cache design using cache-coherence-enabled adaptive refresh.
ACM Trans. Design Autom. Electr. Syst., 2013

Accurate age counter for wear leveling on non-volatile based main memory.
Des. Autom. Embed. Syst., 2013

Coordinate page allocation and thread group for improving main memory power efficiency.
Proceedings of the Workshop on Power-Aware Computing and Systems, 2013

Cache coherence enabled adaptive refresh for volatile STT-RAM.
Proceedings of the Design, Automation and Test in Europe, 2013

Migration-aware loop retiming for STT-RAM based hybrid cache for embedded systems.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013

2012
Hybrid nonvolatile disk cache for energy-efficient and high-performance systems.
ACM Trans. Design Autom. Electr. Syst., 2012

Code Motion for Migration Minimization in STT-RAM Based Hybrid Cache.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012

MAC: migration-aware compilation for STT-RAM based hybrid cache in embedded systems.
Proceedings of the International Symposium on Low Power Electronics and Design, 2012

TEACA: Thread ProgrEss Aware Coherence Adaption for hybrid coherence protocols.
Proceedings of the IEEE 10th Symposium on Embedded Systems for Real-time Multimedia, 2012

2011
Cooperating Write Buffer Cache and Virtual Memory Management for Flash Memory Based Systems.
Proceedings of the 17th IEEE Real-Time and Embedded Technology and Applications Symposium, 2011

Exploiting set-level write non-uniformity for energy-efficient NVM-based hybrid cache.
Proceedings of the 9th IEEE Symposium on Embedded Systems for Real-Time Multimedia, 2011

ExLRU: a unified write buffer cache management for flash memory.
Proceedings of the 11th International Conference on Embedded Software, 2011

2010
Write activity reduction on flash main memory via smart victim cache.
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010


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