Marc Aoulaiche

According to our database1, Marc Aoulaiche authored at least 11 papers between 2007 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2018
Overview of 3D NAND Technologies and Outlook Invited Paper.
Proceedings of the Non-Volatile Memory Technology Symposium, 2018

2015
Reliability impact of advanced doping techniques for DRAM peripheral MOSFETs.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

Assessment of SiGe quantum well transistors for DRAM peripheral applications.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

I/O thick oxide device integration using Diffusion and Gate Replacement (D&GR) gate stack integration.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

Off-state stress degradation mechanism on advanced p-MOSFETs.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

2014
Investigation of Bulk and DTMOS triple-gate devices under 60 MeV proton irradiation.
Microelectron. Reliab., 2014

Impact of Off State Stress on advanced high-K metal gate NMOSFETs.
Proceedings of the 44th European Solid State Device Research Conference, 2014

2013
Impact of Al2O3 position on performances and reliability in high-k metal gated DRAM periphery transistors.
Proceedings of the European Solid-State Device Research Conference, 2013

2012
On the correlation between the retention time of FBRAM and the low-frequency noise of UTBOX SOI nMOSFETs.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012

2007
NBTI reliability of Ni FUSI/HfSiON gates: Effect of silicide phase.
Microelectron. Reliab., 2007

Negative bias temperature instabilities in HfSiO(N)-based MOSFETs: Electrical characterization and modeling.
Microelectron. Reliab., 2007


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