Naoto Horiguchi
According to our database1,
Naoto Horiguchi
authored at least 45 papers
between 2012 and 2023.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2023
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Nanosheet-based Complementary Field-Effect Transistors (CFETs) at 48nm Gate Pitch, and Middle Dielectric Isolation to enable CFET Inner Spacer Formation and Multi-Vt Patterning.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Novel Low Thermal Budget CMOS RMG: Performance and Reliability Benchmark Against Conventional High Thermal Budget Gate Stack Solutions.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Proceedings of the IEEE International Reliability Physics Symposium, 2023
2022
Scaled FinFETs Connected by Using Both Wafer Sides for Routing via Buried Power Rails.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Demonstration of 3D sequential FD-SOI on CMOS FinFET stacking featuring low temperature Si layer transfer and top tier device fabrication with tier interconnections.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
High Performance Thermally Resistant FinFETs DRAM Peripheral CMOS FinFETs with VTH Tunability for Future Memories.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Evaluating Forksheet FET Reliability Concerns by Experimental Comparison with Co-integrated Nanosheets.
Proceedings of the IEEE International Reliability Physics Symposium, 2022
Proceedings of the IEEE International Reliability Physics Symposium, 2022
Thermally stable, packaged aware LV HKMG platforms benchmark to enable low power I/O for next 3D NAND generations.
Proceedings of the IEEE International Memory Workshop, 2022
Innovations in Transistor Architecture and Device Connectivity for Advanced Logic Scaling.
Proceedings of the International Conference on IC Design and Technology, 2022
2021
Proceedings of the IEEE International Reliability Physics Symposium, 2021
Novel low thermal budget gate stack solutions for BTI reliability in future Logic Device technologies : Invited paper.
Proceedings of the International Conference on IC Design and Technology, 2021
2020
Conduction and Breakdown Mechanisms in Low-k Spacer and Nitride Spacer Dielectric Stacks in Middle of Line Interconnects.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020
2019
Gate-Stack Engineered NBTI Improvements in Highvoltage Logic-For-Memory High-ĸ/Metal Gate Devices.
Proceedings of the IEEE International Reliability Physics Symposium, 2019
Study of the Mechanical Stress Impact on Silicide Contact Resistance by 4-Point Bending.
Proceedings of the IEEE International Reliability Physics Symposium, 2019
CDM-Time Domain Turn-on Transient of ESD Diodes in Bulk FinFET and GAA NW Technologies.
Proceedings of the IEEE International Reliability Physics Symposium, 2019
Impact of Device Architecture and Gate Stack Processing on the Low-Frequency Noise of Silicon Nanowire Transistors.
Proceedings of the 13th IEEE International Conference on ASIC, 2019
2018
Scalability comparison between raised- and embedded-SiGe source/drain structures for Si<sub>0.55</sub>Ge<sub>0.45</sub> implant free quantum well pFET.
Microelectron. Reliab., 2018
Proceedings of the IEEE International Reliability Physics Symposium, 2018
ESD diodes with Si/SiGe superlattice I/O finFET architecture in a vertically stacked horizontal nanowire technology.
Proceedings of the 48th European Solid-State Device Research Conference, 2018
2017
Proceedings of the 47th European Solid-State Device Research Conference, 2017
Proceedings of the 47th European Solid-State Device Research Conference, 2017
Proceedings of the 47th European Solid-State Device Research Conference, 2017
2016
Proceedings of the 46th European Solid-State Device Research Conference, 2016
2015
Proceedings of the IEEE International Reliability Physics Symposium, 2015
NBTI in Si0.55Ge0.45 cladding p-FinFETs: Porting the superior reliability from planar to 3D architectures.
Proceedings of the IEEE International Reliability Physics Symposium, 2015
Time dependent variability in RMG-HKMG FinFETs: Impact of extraction scheme on stochastic NBTI.
Proceedings of the IEEE International Reliability Physics Symposium, 2015
Proceedings of the 2015 International Conference on IC Design & Technology, 2015
Proceedings of the 2015 International Conference on IC Design & Technology, 2015
Proceedings of the 2015 International Conference on IC Design & Technology, 2015
I/O thick oxide device integration using Diffusion and Gate Replacement (D&GR) gate stack integration.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015
Proceedings of the 2015 International Conference on IC Design & Technology, 2015
Statistical simulations of 6T-SRAM cell ageing using a reliability aware simulation flow.
Proceedings of the 45th European Solid State Device Research Conference, 2015
Proceedings of the 45th European Solid State Device Research Conference, 2015
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
2014
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014
2013
Impact of Al2O3 position on performances and reliability in high-k metal gated DRAM periphery transistors.
Proceedings of the European Solid-State Device Research Conference, 2013
2012
Understanding the Basic Advantages of Bulk FinFETs for Sub- and Near-Threshold Logic Circuits From Device Measurements.
IEEE Trans. Circuits Syst. II Express Briefs, 2012
Superior reliability and reduced Time-Dependent variability in high-mobility SiGe channel pMOSFETs for VLSI logic applications.
Proceedings of the IEEE International Conference on IC Design & Technology, 2012
Low-frequency noise assessment of the transport mechanisms in SiGe channel bulk FinFETs.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012
Proceedings of the 2012 European Solid-State Device Research Conference, 2012