Pierre Fazan

According to our database1, Pierre Fazan authored at least 11 papers between 2005 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2022
High Performance Thermally Resistant FinFETs DRAM Peripheral CMOS FinFETs with VTH Tunability for Future Memories.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

Bias Temperature Instability (BTI) of High-Voltage Devices for Memory Periphery.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

2019
Gate-Stack Engineered NBTI Improvements in Highvoltage Logic-For-Memory High-ĸ/Metal Gate Devices.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

2015
Reliability impact of advanced doping techniques for DRAM peripheral MOSFETs.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

Assessment of SiGe quantum well transistors for DRAM peripheral applications.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

I/O thick oxide device integration using Diffusion and Gate Replacement (D&GR) gate stack integration.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

Off-state stress degradation mechanism on advanced p-MOSFETs.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

2013
Impact of Al2O3 position on performances and reliability in high-k metal gated DRAM periphery transistors.
Proceedings of the European Solid-State Device Research Conference, 2013

2012
On the correlation between the retention time of FBRAM and the low-frequency noise of UTBOX SOI nMOSFETs.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012

Low-power DRAM-compatible Replacement Gate High-k/Metal Gate stacks.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012

2005
Zero capacitor embedded memory technology for system on chip.
Proceedings of the 13th IEEE International Workshop on Memory Technology, 2005


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