Olivier Potin

Orcid: 0000-0001-9110-2800

According to our database1, Olivier Potin authored at least 24 papers between 2012 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Montgomery Multiplication Scalable Systolic Designs Optimized for DSP48E2.
ACM Trans. Reconfigurable Technol. Syst., March, 2024

2023
Experimental EMFI detection on a RISC-V core using the Trace Verifier solution.
Microprocess. Microsystems, 2023

CIFER: Code Integrity and control Flow verification for programs Executed on a RISC-V core.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2023

Lightweight Countermeasures Against Original Linear Code Extraction Attacks on a RISC-V Core.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2023

Fault Injection on Embedded Neural Networks: Impact of a Single Instruction Skip.
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

Software-Only Control-Flow Integrity Against Fault Injection Attacks.
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

Security Evaluation of a Hybrid CMOS/MRAM Ascon Hardware Implementation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

A CCFI Verification Scheme Based on the RISC-V Trace Encoder.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2023

2022
Real-Time Frequency Detection to Synchronize Fault Injection on System-on-Chip.
IACR Cryptol. ePrint Arch., 2022

CMOS/STT-MRAM Based Ascon LWC: a Power Efficient Hardware Implementation.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

A CFI Verification System based on the RISC-V Instruction Trace Encoder.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

Combined Fault Injection and Real-Time Side-Channel Analysis for Android Secure-Boot Bypassing.
Proceedings of the Smart Card Research and Advanced Applications, 2022

2020
Experimental Analysis of the Electromagnetic Instruction Skip Fault Model.
Proceedings of the 15th Design & Technology of Integrated Systems in Nanoscale Era, 2020

2019
Experimental Analysis of the Laser-Induced Instruction Skip Fault Model.
Proceedings of the Secure IT Systems, 2019

2018
Assessing body built-in current sensors for detection of multiple transient faults.
Microelectron. Reliab., 2018

All paths lead to Rome: Polymorphic Runtime Code Generation for Embedded Systems.
Proceedings of the Fifth Workshop on Cryptography and Security in Computing Systems, 2018

2017
Runtime Code Polymorphism as a Protection Against Side Channel Attacks.
IACR Cryptol. ePrint Arch., 2017

Filtering-based CPA: a successful side-channel attack against desynchronization countermeasures.
Proceedings of the Fourth Workshop on Cryptography and Security in Computing Systems, 2017

2014
Improving the ability of Bulk Built-In Current Sensors to detect Single Event Effects by using triple-well CMOS.
Microelectron. Reliab., 2014

2013
Sensitivity tuning of a bulk built-in current sensor for optimal transient-fault detection.
Microelectron. Reliab., 2013

A novel implementation of the histogram-based technique for measurement of INL of LUT-based correction of ADC.
Microelectron. J., 2013

Implementing model redundancy in predictive alternate test to improve test confidence.
Proceedings of the 18th IEEE European Test Symposium, 2013

2012
Smart selection of indirect parameters for DC-based alternate RF IC testing.
Proceedings of the 30th IEEE VLSI Test Symposium, 2012

Making predictive analog/RF alternate test strategy independent of training set size.
Proceedings of the 2012 IEEE International Test Conference, 2012


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