Yves Durand

According to our database1, Yves Durand authored at least 32 papers between 1988 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2022
Accelerating Variants of the Conjugate Gradient with the Variable Precision Processor.
Proceedings of the 29th IEEE Symposium on Computer Arithmetic, 2022

2021
Seamless Compiler Integration of Variable Precision Floating-Point Arithmetic.
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2021

2020
Channel-bonding CMOS transceiver for 100 Gbps wireless point-to-point links.
EURASIP J. Wirel. Commun. Netw., 2020

VP Float: First Class Treatment for Variable Precision Floating Point Arithmetic.
Proceedings of the PACT '20: International Conference on Parallel Architectures and Compilation Techniques, 2020

2019
Fine-Grain Back Biasing for the Design of Energy-Quality Scalable Operators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Byte-Aware Floating-point Operations through a UNUM Computing Unit.
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

Evaluation of variable bit-width units in a RISC-V processor for approximate computing.
Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019

Error Analysis of the Square Root Operation for the Purpose of Precision Tuning: A Case Study on K-means.
Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

Dynamic Precision Numerics Using a Variable-Precision UNUM Type I HW Coprocessor.
Proceedings of the 26th IEEE Symposium on Computer Arithmetic, 2019

2018
Evaluation of approximate operators case study: sobel filter application executed on an approximate RISC-V platform.
Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

2017
A Programmable Inbound Transfer Processor for Active Messages in Embedded Multicore Systems.
Proceedings of the Euromicro Conference on Digital System Design, 2017

A methodology for the design of dynamic accuracy operators by runtime back bias.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
Distributed Dynamic Rate Adaptation on a Network on Chip with Traffic Distortion.
Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016

EUROSERVER: Share-anything scale-out micro-server design.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2014
Guaranteed Services of the NoC of a Manycore Processor.
Proceedings of the 2014 International Workshop on Network on Chip Architectures, 2014

Assimilation of TerraSAR-X data into a snowpack model.
Proceedings of the 2014 IEEE Geoscience and Remote Sensing Symposium, 2014

Comparison between DMRT simulations for multilayer snowpack and data from NoSREx report.
Proceedings of the 2014 IEEE Geoscience and Remote Sensing Symposium, 2014

Dry snow analysis in alpine regions using RADARSAT-2 full polarimetry data. Comparison with in situ measurements.
Proceedings of the 2014 IEEE Geoscience and Remote Sensing Symposium, 2014

EUROSERVER: Energy Efficient Node for European Micro-Servers.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

2012
Multilayer snowpack backscattering model and assimilation of TerraSAR-X satellite data.
Proceedings of the 2012 IEEE International Geoscience and Remote Sensing Symposium, 2012

Multi-temporal wet snow mapping in alpine context using polarimetric Radarsat-2 time-series.
Proceedings of the 2012 IEEE International Geoscience and Remote Sensing Symposium, 2012

2009
Methods for power optimization in SOC-based data flow systems.
ACM Trans. Design Autom. Electr. Syst., 2009

Snowpack Characterization in Mountainous Regions Using C-Band SAR Data and a Meteorological Model.
IEEE Trans. Geosci. Remote. Sens., 2009

The Radio Virtual Machine: A solution for SDR portability and platform reconfigurability.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

A Microprogrammable Memory Controller for high-performance dataflow applications.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

2008
A Reconfigurable Baseband Platform Based on an Asynchronous Network-on-Chip.
IEEE J. Solid State Circuits, 2008

2007
A Telecom Baseband Circuit based on an Asynchronous Network-on-Chip.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2006
Power Modeling of a NoC Based Design for High Speed Telecommunication Systems.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

2005
Performance Evaluation of a NoC-Based Design for MC-CDMA Telecommunications Using NS-2.
Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 2005

2003
Radiometric and geometric correction of RADARSAT-1 images acquired in alpine regions for mapping the snow water equivalent (SWE).
Proceedings of the 2003 IEEE International Geoscience and Remote Sensing Symposium, 2003

2002
A Middleware Architecture for Personalized Communities of Devices.
Proceedings of the Distributed Communities on the Web, 4th International Workshop, 2002

1988
Expériences en synthèse logique. (Experiments in logic synthesis).
PhD thesis, 1988


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