Kotb Jabeur

According to our database, Kotb Jabeur authored at least 20 papers between 2009 and 2018.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2018

Using multifunctional standardized stack as universal spintronic technology for IoT.

Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Sophiane Senni, Jad Mohdad, Frédérick Mailly, Lionel Torres, Pascal Benoit, Abdoulaye Gamatié, Pascal Nouet, Frederic Ouattara, Gilles Sassatelli, Kotb Jabeur, Pierre Vanhauwaert, A. Atitoaie, I. Firastrau, Gregory di Pendina, Guillaume Prenat

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

GREAT: HeteroGeneous IntegRated Magnetic tEchnology Using Multifunctional Standardized sTack.

Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Sophiane Senni, Jad Mohdad, Frédérick Mailly, Lionel Torres, Pascal Benoit, Pascal Nouet, Rui Ma, Martin Kreißig, Frank Ellinger, Kotb Jabeur, Pierre Vanhauwaert, Gregory di Pendina, Guillaume Prenat

Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

2016

Ultra-Fast and High-Reliability SOT-MRAM: From Cache Replacement to Normally-Off Computing.

Guillaume Prenat, Kotb Jabeur, Pierre Vanhauwaert, Gregory di Pendina, Fabian Oboril, Rajendra Bishnoi, Mojtaba Ebrahimi, Nathalie Lamard, Olivier Boulle, Kevin Garello, Juergen Langer, Berthold Ocker, Marie Claire Cyrille, Pietro Gambardella, Mehdi Baradaran Tahoori, Gilles Gaudin

IEEE Trans. Multi Scale Comput. Syst., 2016

Reducing System Power Consumption Using Check-Pointing on Nonvolatile Embedded Magnetic Random Access Memories.

Christophe Layer, Laurent Becker, Kotb Jabeur, Sylvain Claireux, Bernard Dieny, Guillaume Prenat, Gregory di Pendina, Stephane Gros, Pierre Paoli, Virgile Javerliac, Fabrice Bernard-Granger, Loïc Decloedt

ACM J. Emerg. Technol. Comput. Syst., 2016

2015

Multi-Level Mapping of Nanocomputer Architectures Based on Hardware Reuse.

Nataliya Yakymets, Ian O'Connor, Kotb Jabeur, Sébastien Le Beux

IEEE J. Emerg. Sel. Topics Circuits Syst., 2015

Low-power hybrid STT/CMOS system-on-chip embedding non-volatile magnetic memory blocks.

Christophe Layer, Kotb Jabeur, Stephane Gros, Laurent Becker, Pierre Paoli, Fabrice Bernard-Granger, Virgile Javerliac, Bernard Dieny

Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015

Hybrid STT/CMOS Design of an Interrupt Based Instant On/Off Mechanism for Low-Power SoC.

Christophe Layer, Kotb Jabeur, Laurent Becker, Bernard Dieny, Stephane Gros, Virgile Javerliac, Pierre Paoli, Fabrice Bernard-Granger

Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

2014

Hybrid CMOS/magnetic Process Design Kit and SOT-based non-volatile standard cell architectures.

Gregory di Pendina, Kotb Jabeur, Guillaume Prenat

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013

Functions classification approach to generate reconfigurable fine-grain logic based on Ambipolar Independent Double Gate FET (Am-IDGFET).

Kotb Jabeur, Ian O'Connor, Nataliya Yakymets

Microelectron. J., 2013

2012

Ambipolar independent double gate FET logic.

Ian O'Connor, Kotb Jabeur, Sébastien Le Beux, David Navarro

Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, 2012

Low-power design technique with ambipolar double gate devices.

Kotb Jabeur, Ian O'Connor, David Navarro, Sébastien Le Beux

Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, 2012

Ambipolar double gate CNTFETs based reconfigurable logic cells.

Kotb Jabeur, Ian O'Connor, Sébastien Le Beux, David Navarro

Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, 2012

Ambipolar double-gate FETs for the design of compact logic structures.

Kotb Jabeur, Ian O'Connor, Nataliya Yakymets, Sébastien Le Beux

Proceedings of the Great Lakes Symposium on VLSI 2012, 2012

2011

Multi-objective mapping for matrix-based nanocomputer architectures.

Nataliya Yakymets, Sébastien Le Beux, Kotb Jabeur, Ian O'Connor

Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

Ambipolar double-gate FET binary-decision- diagram (Am-BDD) for reconfigurable logic cells.

Kotb Jabeur, Nataliya Yakymets, Ian O'Connor, Sébastien Le Beux

Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures, 2011

High performance 4: 1 multiplexer with ambipolar double-gate FETs.

Kotb Jabeur, Ian O'Connor, Nataliya Yakymets, Sébastien Le Beux

Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Fine-grain reconfigurable logic cells based on double-gate CNTFETs.

Kotb Jabeur, Nataliya Yakymets, Ian O'Connor, Sébastien Le Beux

Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

2010

Reducing transistor count in clocked standard cells with ambipolar double-gate FETs.

Kotb Jabeur, David Navarro, Ian O'Connor, Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Fabien Clermidy

Proceedings of the 2010 IEEE/ACM International Symposium on Nanoscale Architectures, 2010

Logic cells and interconnect strategies for nanoscale reconfigurable computing fabrics.

Ian O'Connor, Kotb Jabeur, David Navarro, Nataliya Yakymets, Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Fabien Clermidy

Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009

Emerging Technologies and Nanoscale Computing Fabrics.

Ian O'Connor, Junchen Liu, Kotb Jabeur, Nataliya Yakymets, Renaud Daviot, David Navarro, Pierre-Emmanuel Gaillardon, Fabien Clermidy, Maimouna Amadou, Gabriela Nicolescu

Proceedings of the VLSI-SoC: Technologies for Systems Integration, 2009