Chuan Seng Tan

According to our database1, Chuan Seng Tan authored at least 19 papers between 2004 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
Design Considerations and Fabrication Challenges of Surface Electrode Ion Trap with TSV Integration.
Proceedings of the 2019 International 3D Systems Integration Conference (3DIC), 2019

TiN Guard Ring Around TSV for Cross-Talk Suppression of Parallel Networking of Data Center.
Proceedings of the 2019 International 3D Systems Integration Conference (3DIC), 2019

2017
Yield Enhancement of Face-to-Face Cu-Cu Bonding With Dual-Mode Transceivers in 3DICs.
IEEE Trans. Very Large Scale Integr. Syst., 2017

2016
Non-destructive degradation study of copper wire bond for its temperature cycling reliability evaluation.
Microelectron. Reliab., 2016

Through-substrate via (TSV) with embedded capacitor as an on-chip energy storage element.
Proceedings of the 2016 IEEE International 3D Systems Integration Conference, 2016

2015
Copper micro and nano particles mixture for 3D interconnections application.
Proceedings of the 2015 International 3D Systems Integration Conference, 2015

2014
Robust Electromigration reliability through engineering optimization.
Microelectron. Reliab., 2014

Simulation and design of AIN piezoelectric resonator for infrared sensing application utilizing lamb wave mode.
Proceedings of the 2014 IEEE Ninth International Conference on Intelligent Sensors, 2014

2013
Reliable 3-D Clock-Tree Synthesis Considering Nonlinear Capacitive TSV Model With Electrical-Thermal-Mechanical Coupling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Thermal-reliable 3D clock-tree synthesis considering nonlinear electrical-thermal-coupled TSV model.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

The dependency of TSV keep-out zone (KOZ) on Si crystal direction and liner material.
Proceedings of the 2013 IEEE International 3D Systems Integration Conference (3DIC), 2013

2011
Three-Dimensional Integration of Integrated Circuits - an Introduction.
Proceedings of the 3D Integration for NoC-based SoC Architectures, 2011

Integration schemes and enabling technologies for three-dimensional integrated circuits.
IET Comput. Digit. Tech., 2011

3D integration of MEMS and CMOS via Cu-Cu bonding with simultaneous formation of electrical, mechanical and hermetic bonds.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

2010
Fine-pitch bump-less Cu-Cu bonding for wafer-on-wafer stacking and its quality enhancement.
Proceedings of the IEEE International Conference on 3D System Integration, 2010

2009
Impact of thermal through silicon via (TTSV) on the temperature profile of multi-layer 3-D device stack.
Proceedings of the IEEE International Conference on 3D System Integration, 2009

Achieving low temperature Cu to Cu diffusion bonding with self assembly monolayer (SAM) passivation.
Proceedings of the IEEE International Conference on 3D System Integration, 2009

2006
Multi-layer 3D silicon electronics enabled by wafer bonding.
PhD thesis, 2006

2004
Technology, performance, and computer-aided design of three-dimensional integrated circuits.
Proceedings of the 2004 International Symposium on Physical Design, 2004


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