Luca Piccolboni

Orcid: 0000-0003-0094-4960

According to our database1, Luca Piccolboni authored at least 23 papers between 2014 and 2024.

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Bibliography

2024

2023
An Analysis of Accelerator Data-Transfer Modes in NoC-Based SoC Architectures.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2023

2022
Multi-Functional Interfaces for Accelerators
PhD thesis, 2022

Accelerators & Security: The Socket Approach.
IEEE Comput. Archit. Lett., 2022

2021
CRYLOGGER: Detecting Crypto Misuses Dynamically.
Proceedings of the 42nd IEEE Symposium on Security and Privacy, 2021

MasterMind: Many-Accelerator SoC Architecture for Real-Time Brain-Computer Interfaces.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021

HARDROID: Transparent Integration of Crypto Accelerators in Android.
Proceedings of the 2021 IEEE High Performance Extreme Computing Conference, 2021

Scaling Up Hardware Accelerator Verification using A-QED with Functional Decomposition.
Proceedings of the Formal Methods in Computer Aided Design, 2021

2020
Mangrove: An Inference-Based Dynamic Invariant Mining for GPU Architectures.
IEEE Trans. Computers, 2020

Agile SoC Development with Open ESP.
CoRR, 2020

Agile SoC Development with Open ESP : Invited Paper.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2019
Securing Accelerators with Dynamic Information Flow Tracking.
CoRR, 2019

Teaching Heterogeneous Computing with System-Level Design Methods.
Proceedings of the Workshop on Computer Architecture Education, 2019

KAIROS: Incremental Verification in High-Level Synthesis through Latency-Insensitive Design.
Proceedings of the 2019 Formal Methods in Computer Aided Design, 2019

2018
PAGURUS: Low-Overhead Dynamic Information Flow Tracking on Loosely Coupled Accelerators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

2017
Efficient Control-Flow Subgraph Matching for Detecting Hardware Trojans in RTL Models.
ACM Trans. Embed. Comput. Syst., 2017

COSMOS: Coordination of High-Level Synthesis and Memory Optimization for Hardware Accelerators.
ACM Trans. Embed. Comput. Syst., 2017

Broadening the exploration of the accelerator design space in embedded scalable platforms.
Proceedings of the 2017 IEEE High Performance Extreme Computing Conference, 2017

A homogeneous framework for AMS languages instrumentation, abstraction and simulation.
Proceedings of the 22nd IEEE European Test Symposium, 2017

2016
Stimuli generation through invariant mining for black-box verification.
Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016

2015
Exploiting GPU architectures for dynamic invariant mining.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

A parallelizable approach for mining likely invariants.
Proceedings of the 2015 International Conference on Hardware/Software Codesign and System Synthesis, 2015

2014
Simplified stimuli generation for scenario and assertion based verification.
Proceedings of the 15th Latin American Test Workshop, 2014


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