Korkut Kaan Tokgoz
Orcid: 0000-0002-5724-6349Affiliations:
- Tokyo Institute of Technology, Japan
According to our database1,
Korkut Kaan Tokgoz
authored at least 32 papers
between 2015 and 2025.
Collaborative distances:
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Bibliography
2025
IEEE Commun. Lett., June, 2025
Frequency-Dependent Power Consumption Modeling of CMOS Transmitters for WNoC Architectures.
CoRR, May, 2025
A Complete Circuit Model for Terahertz Spoof Surface Plasmon Polariton Waveguides for Ultrafast and Accurate Synthesis of Terahertz Integrated Circuits.
IEEE Access, 2025
Dynamic Analysis of OOK Modulators Using Eye Diagrams to Assess Data Rate and Output Matching.
Proceedings of the 21st International Conference on Synthesis, 2025
Proceedings of the 21st International Conference on Synthesis, 2025
Proceedings of the 21st International Conference on Synthesis, 2025
A Comparative Study on Phase Noise Model in Ultra-High Data-Rate Sub-THz Communications.
Proceedings of the Joint European Conference on Networks and Communications & 6G Summit, 2025
2024
A neural network-based DPD coefficient determination for PA linearization in 5G and beyond-5G mmWave systems.
IEICE Electron. Express, 2024
2022
A Bi-Directional 300-GHz-Band Phased-Array Transceiver in 65-nm CMOS With Outphasing Transmitting Mode and LO Emission Cancellation.
IEEE J. Solid State Circuits, 2022
F-band Frequency Multipliers with Fundamental and Harmonic Rejection for Improved Conversion Gain and Output Power.
IEICE Trans. Electron., 2022
A Data Augmentation Method for Cow Behavior Estimation Systems Using 3-Axis Acceleration Data and Neural Network Technology.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2022
TinyCowNet: Memory- and Power-Minimized RNNs Implementable on Tiny Edge Devices for Lifelong Cow Behavior Distribution Estimation.
IEEE Access, 2022
2021
A 216 μW, 87% Accurate Cow Behavior Classifying Decision Tree on FPGA with Interpolated Arctan2.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Current-Starved Chaotic Oscillator Over Multiple Frequency Decades on Low-Cost CMOS: Towards Distributed and Scalable Environmental Sensing with a Myriad of Nodes.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
Capacitive Sensor Circuit with Relative Slope-Boost Method Based on a Relaxation Oscillator.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
2020
A 28-GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR.
IEEE J. Solid State Circuits, 2020
Distributed Sensing Via Inductively Coupled Single-Transistor Chaotic Oscillators: A New Approach and Its Experimental Proof-of-Concept.
IEEE Access, 2020
2019
A 50.1-Gb/s 60-GHz CMOS Transceiver for IEEE 802.11ay With Calibration of LO Feedthrough and I/Q Imbalance.
IEEE J. Solid State Circuits, 2019
A 28GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
IEICE Electron. Express, 2018
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018
2017
IEEE J. Solid State Circuits, 2017
24.9 A 128-QAM 60GHz CMOS transceiver for IEEE802.11ay with calibration of LO feedthrough and I/Q imbalance.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
Proceedings of the 12th IEEE International Conference on ASIC, 2017
2016
A Fractional-N Sub-Sampling PLL using a Pipelined Phase-Interpolator With an FoM of -250 dB.
IEEE J. Solid State Circuits, 2016
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2015
Characterization of Crossing Transmission Line Using Two-Port Measurements for Millimeter-Wave CMOS Circuit Design.
IEICE Trans. Electron., 2015
A fractional-N sub-sampling PLL using a pipelined phase-interpolator with a FoM of -246dB.
Proceedings of the ESSCIRC Conference 2015, 2015