Kosuke Yanagidaira

According to our database1, Kosuke Yanagidaira authored at least 13 papers between 2009 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2025
UEO Channel Routing Algorithm to Alleviate Local Congestion for Generalized Channels.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2025


Gap Channel Routing with Fixed Wires.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

2023
A 1-Tb 4-b/cell 4-Plane 162-Layer 3-D Flash Memory With 2.4-Gb/s IO Interface.
IEEE J. Solid State Circuits, 2023

A 1Tb 3b/Cell 3D-Flash Memory of more than 17Gb/mm<sup>2</sup> bit density with 3.2Gbps interface and 205MB/s program throughput.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

7-Bit/2Cell (X3.5), 9-Bit/2Cell (X4.5) NAND Flash Memory: Half Bit technology.
Proceedings of the IEEE International Memory Workshop, 2023

2022

2021

2020
A 1.33-Tb 4-Bit/Cell 3-D Flash Memory on a 96-Word-Line-Layer Technology.
IEEE J. Solid State Circuits, 2020

2019

2012
A 151-mm<sup>2</sup> 64-Gb 2 Bit/Cell NAND Flash Memory in 24-nm CMOS Technology.
IEEE J. Solid State Circuits, 2012

2011

2009


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