Kevin Garello

According to our database, Kevin Garello authored at least 10 papers between 2016 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

A Low-Power Bayesian Head Using SOT-MRAM Arrays for Uncertainty-Aware Binary Neural Networks.

Joao Henrique Quintino Palhares, Bruno Lovison Franco, Louis Hutin, Jonathan Miquel, Kamel-Eddine Harabi, Aymen Romdhane, Kevin Garello

Proceedings of the Design, Automation & Test in Europe Conference, 2026

2025

Intrinsic Annealing in a Hybrid Memristor-Magnetic Tunnel Junction Ising Machine.

Mohammed Akib Iftakher, Hugo Levices, Kamel-Eddine Harabi, Adrien Renaudineau, Mathieu-Coumba Faye, Corentin Bouchard, Florian Disdier, Bernard Viala, Elisa Vianello, Philippe Talatchian, Kevin Garello, Damien Querlioz, Louis Hutin

CoRR, June, 2025

2023

A tunable and versatile 28nm FD-SOI crossbar output circuit for low power analog SNN inference with eNVM synapses.

Joao Henrique Quintino Palhares, Yann Beilliard, Jury Sandrini, Franck Arnaud, Kevin Garello, Guillaume Prenat, Lorena Anghel, Fabien Alibart, Dominique Drouin, Philippe Galy

CoRR, 2023

2020

Physics based modeling of bimodal electromigration failure distributions and variation analysis for VLSI interconnects.

Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi B. Tahoori, Houman Zahedmanesh, Kristof Croes, Kevin Garello, Gouri Sankar Kar, Francky Catthoor

Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2019

Manufacturable 300mm platform solution for Field-Free Switching SOT-MRAM.

Kevin Garello, Farrukh Yasin, Hubert Hody, Sebastien Couet, Laurent Souriau, Shamin H. Sharifi, Johan Swerts, Robert Carpenter, Sidharth Rao, Wonsub Kim, J. Wu, K. K. V. Sethu, M. Pak, N. Jossart, D. Crotti, Arnaud Furnémont, Gouri Sankar Kar

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

Variation-Aware Physics-Based Electromigration Modeling and Experimental Calibration for VLSI Interconnects.

Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori, Houman Zahedmanesh, Kristof Croes, Kevin Garello, Gouri Sankar Kar, Francky Catthoor

Proceedings of the IEEE International Reliability Physics Symposium, 2019

2018

SOT-MRAM 300mm integration for low power and ultrafast embedded memories.

Kevin Garello, Farrukh Yasin, Sebastien Couet, Laurent Souriau, Johan Swerts, Sidharth Rao, Simon Van Beek, Wonsub Kim, Enlong Liu, Shreya Kundu, Diana Tsvetanova, N. Jossart, Kris Croes, E. Grimaldi, M. Baumgartner, D. Crotti, Arnaud Furnémont, Pietro Gambardella, Gouri Sankar Kar

CoRR, 2018

SOT-MRAM 300MM Integration for Low Power and Ultrafast Embedded Memories.

Kevin Garello, Kevin Garello Yasin, Sebastien Couet, Laurent Souriau, Johan Swerts, Sidharth Rao, Simon Van Beek, Wonsub Kim, Enlong Liu, Shreya Kundu, Diana Tsvetanova, Kris Croes, N. Jossart, E. Grimaldi, M. Baumgartner, D. Crotti, Arnaud Fumemont, Pietro Gambardella, Gouri Sankar Kar

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

SOT-MRAM 300MM Integration for Low Power and Ultrafast Embedded Memories.

Kevin Garello, Kevin Garello Yasin, Sebastien Couet, Laurent Souriau, Johan Swerts, Sidharth Rao, Simon Van Beek, Wonsub Kim, Enlong Liu, Shreya Kundu, Diana Tsvetanova, Kris Croes, N. Jossart, E. Grimaldi, M. Baumgartner, D. Crotti, Arnaud Fumemont, Pietro Gambardella, Gouri Sankar Kar

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

2016

Ultra-Fast and High-Reliability SOT-MRAM: From Cache Replacement to Normally-Off Computing.

Guillaume Prenat, Kotb Jabeur, Pierre Vanhauwaert, Gregory di Pendina, Fabian Oboril, Rajendra Bishnoi, Mojtaba Ebrahimi, Nathalie Lamard, Olivier Boulle, Kevin Garello, Juergen Langer, Berthold Ocker, Marie Claire Cyrille, Pietro Gambardella, Mehdi Baradaran Tahoori, Gilles Gaudin

IEEE Trans. Multi Scale Comput. Syst., 2016