Niti Madan

According to our database1, Niti Madan authored at least 11 papers between 2007 and 2023.

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Bibliography

2023

2011
CHOP: Integrating DRAM Caches for CMP Server Platforms.
IEEE Micro, 2011

A case for guarded power gating for multi-core processors.
Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011

2010
Guarded Power Gating in a Multi-core Setting.
Proceedings of the Computer Architecture, 2010

CHOP: Adaptive filter-based DRAM caching for CMP server platforms.
Proceedings of the 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 2010

Power-efficient, reliable microprocessor architectures: modeling and design methods.
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

2009
Leveraging Mixed Process Three-Dimensional Die Stacking Technology for Cache Hierarchies and Reliability.
PhD thesis, 2009

Optimizing communication and capacity in a 3D stacked reconfigurable cache hierarchy.
Proceedings of the 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 2009

2008
Scalable and reliable communication for hardware transactional memory.
Proceedings of the 17th International Conference on Parallel Architectures and Compilation Techniques, 2008

2007
Power Efficient Approaches to Redundant Multithreading.
IEEE Trans. Parallel Distributed Syst., 2007

Leveraging 3D Technology for Improved Reliability.
Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40 2007), 2007


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