Rainer Dömer

Gautam Sachdeva

Andreas Gerstlauer

Proceedings of the Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30, 2007

An Interactive Model Re-Coder for Efficient SoC Specification.

[BibT_eX]

[DOI]

Proceedings of the Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30, 2007

Designer-Controlled Generation of Parallel and Flexible Heterogeneous MPSoC Specification.

[BibT_eX]

[DOI]

Proceedings of the 44th Design Automation Conference, 2007

Pointer re-coding for creating definitive MPSoC models.

[BibT_eX]

[DOI]

Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007

Abstract, Multifaceted Modeling of Embedded Processors for System Level Design.

[BibT_eX]

[DOI]

Andreas Gerstlauer

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

Creating Explicit Communication in SoC Models Using Interactive Re-Coding.

[BibT_eX]

[DOI]

Junyu Peng

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006

Fast and accurate transaction level models using result oriented modeling.

[BibT_eX]

[DOI]

Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

A Flexible, Syntax Independent Representation (SIR) for System Level Design Models.

[BibT_eX]

[DOI]

Ines Viskic

Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

Quantitative analysis of transaction level models for the AMBA bus.

[BibT_eX]

[DOI]

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Automatic generation of transaction level models for rapid design space exploration.

[BibT_eX]

[DOI]

Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006

Accurate yet fast modeling of real-time communication.

[BibT_eX]

[DOI]

Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006

2005

Software and Driver Synthesis from Transaction Level Models.

[BibT_eX]

[DOI]

Haobo Yu

Daniel D. Gajski

Proceedings of the From Specification to Embedded Systems Application [International Embedded Systems Symposium, 2005

Automatic Generation of Communication Architectures.

[BibT_eX]

[DOI]

Proceedings of the From Specification to Embedded Systems Application [International Embedded Systems Symposium, 2005

Abstract Communication Modeling.

[BibT_eX]

[DOI]

Proceedings of the From Specification to Embedded Systems Application [International Embedded Systems Symposium, 2005

Automatic network generation for system-on-chip communication design.

[BibT_eX]

[DOI]

Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005

System-level communication modeling for network-on-chip synthesis.

[BibT_eX]

[DOI]

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

Embedded software generation from system level design languages.

[BibT_eX]

[DOI]

Haobo Yu

Daniel Gajski

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

2002

The Formal Execution Semantics of SpecC.

[BibT_eX]

[DOI]

Andreas Gerstlauer

Wolfgang Müller

Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002

2001

System Design - A Practical Guide with SpecC.

[BibT_eX]

[DOI]

Springer, ISBN: 978-0-7923-7387-2, 2001

2000

System-level modeling and design with the SpecC language.

[BibT_eX]

[DOI]

PhD thesis, 2000

Reuse and protection of intellectual property in the SpecC system.

[BibT_eX]

[DOI]

Daniel Gajski

Proceedings of ASP-DAC 2000, 2000

1998

Specification and Design of Embedded Systems.

[BibT_eX]

[DOI]

Daniel D. Gajski

Jianwen Zhu

Informationstechnik Tech. Inform., 1998

IP-Centric Methodology and Specification Language.

[BibT_eX]

Daniel Gajski

Jianwen Zhu

Proceedings of the Distributed and Parallel Embedded Systems, 1998

1997

Built-in chaining: introducing complex components into architectural synthesis.

[BibT_eX]

[DOI]

Peter Marwedel

Birger Landwehr

Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997

1996

A Technique for Avoiding Isomorphic Netlists in Architectural Synthesis.

[BibT_eX]

[DOI]

Proceedings of the 1996 European Design and Test Conference, 1996

1994

OSCAR: optimum simultaneous scheduling, allocation and resource binding based on integer programming.

[BibT_eX]

[DOI]

Birger Landwehr

Peter Marwedel