Siddharth Rao

According to our database, Siddharth Rao authored at least 20 papers between 2017 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

MTJ degradation in multi-pillar SOT-MRAM with selective writing.

Simon Van Beek, Kaiming Cai, Kaiquan Fan, Giacomo Talmelli, Anna Trovato, Nico Jossart, Siddharth Rao, Adrian Vaisman Chasin, Sebastien Couet

Proceedings of the IEEE International Reliability Physics Symposium, 2023

Spin-orbit torque MRAM for ultrafast cache and neuromorphic computing applications.

Siddharth Rao, Kaiming Cai, Giacomo Talmelli, Nathali Franchina-Vergel, Ward Janssens, Hubert Hody, Farrukh Yasin, Kurt Wostyn, Sebastien Couet

Proceedings of the IEEE International Memory Workshop, 2023

Magnetic Domain Wall Memory: A DTCO study for Memory Applications.

M. Gupta, Siddharth Rao, Gouri Sankar Kar, S. Couet

Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023

Device Aware Diagnosis for Unique Defects in STT-MRAMs.

Ahmed Aouichi, Sicong Yuan, Moritz Fieback, Siddharth Rao, Woojin Kim, Erik Jan Marinissen, Sebastien Couet, Mottaqiallah Taouil, Said Hamdioui

Proceedings of the 32nd IEEE Asian Test Symposium, 2023

2022

MFA-MTJ Model: Magnetic-Field-Aware Compact Model of pMTJ for Robust STT-MRAM Design.

Lizhou Wu, Siddharth Rao, Mottaqiallah Taouil, Erik Jan Marinissen, Gouri Sankar Kar, Said Hamdioui

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Characterization, Modeling, and Test of Intermediate State Defects in STT-MRAMs.

Lizhou Wu, Siddharth Rao, Mottaqiallah Taouil, Erik Jan Marinissen, Gouri Sankar Kar, Said Hamdioui

IEEE Trans. Computers, 2022

Special Session: STT-MRAMs: Technology, Design and Test.

Anteneh Gebregiorgis, Lizhou Wu, Christopher Münch, Siddharth Rao, Mehdi B. Tahoori, Said Hamdioui

Proceedings of the 40th IEEE VLSI Test Symposium, 2022

Selective operations of multi-pillar SOT-MRAM for high density and low power embedded memories.

Kaiming Cai, Simon Van Beek, Siddharth Rao, K. Fan, M. Gupta, V. D. Nguyen, Ganesh Jayakumar, Giacomo Talmelli, S. Couet, Gouri Sankar Kar

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

MTJ degradation in SOT-MRAM by self-heating-induced diffusion.

Simon Van Beek, Kaiming Cai, Siddharth Rao, Ganesh Jayakumar, Sebastien Couet, Nico Jossart, Adrian Vaisman Chasin, Gouri Sankar Kar

Proceedings of the IEEE International Reliability Physics Symposium, 2022

2021

Defect and Fault Modeling Framework for STT-MRAM Testing.

Lizhou Wu, Siddharth Rao, Mottaqiallah Taouil, Guilherme Cardoso Medeiros, Moritz Fieback, Erik Jan Marinissen, Gouri Sankar Kar, Said Hamdioui

IEEE Trans. Emerg. Top. Comput., 2021

Testing STT-MRAM: Manufacturing Defects, Fault Models, and Test Solutions.

Lizhou Wu, Siddharth Rao, Mottaqiallah Taouil, Erik Jan Marinissen, Gouri Sankar Kar, Said Hamdioui

Proceedings of the IEEE International Test Conference, 2021

Edge-induced reliability & performance degradation in STT-MRAM: an etch engineering solution.

Simon Van Beek, Siddharth Rao, Shreya Kundu, Woojin Kim, Barry J. O'Sullivan, Stefan Cosemans, Farrukh Yasin, Robert Carpenter, Sebastien Couet, Shamin H. Sharifi, Nico Jossart, Davide Crotti, Gouri Sankar Kar

Proceedings of the IEEE International Reliability Physics Symposium, 2021

Characterization and Fault Modeling of Intermediate State Defects in STT-MRAM.

Lizhou Wu, Siddharth Rao, Mottaqiallah Taouil, Erik Jan Marinissen, Gouri Sankar Kar, Said Hamdioui

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

Survey on STT-MRAM Testing: Failure Mechanisms, Fault Models, and Tests.

Lizhou Wu, Mottaqiallah Taouil, Siddharth Rao, Erik Jan Marinissen, Said Hamdioui

CoRR, 2020

Characterization, Modeling and Test of Synthetic Anti-Ferromagnet Flip Defect in STT-MRAMs.

Lizhou Wu, Siddharth Rao, Mottaqiallah Taouil, Erik Jan Marinissen, Gouri Sankar Kar, Said Hamdioui

Proceedings of the IEEE International Test Conference, 2020

Impact of Magnetic Coupling and Density on STT-MRAM Performance.

Lizhou Wu, Siddharth Rao, Mottaqiallah Taouil, Erik Jan Marinissen, Gouri Sankar Kar, Said Hamdioui

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019

Device-Aware Test: A New Test Approach Towards DPPB Level.

Moritz Fieback, Lizhou Wu, Guilherme Cardoso Medeiros, Hassen Aziza, Siddharth Rao, Erik Jan Marinissen, Mottaqiallah Taouil, Said Hamdioui

Proceedings of the IEEE International Test Conference, 2019

Pinhole Defect Characterization and Fault Modeling for STT-MRAM Testing.

Lizhou Wu, Siddharth Rao, Guilherme Cardoso Medeiros, Mottaqiallah Taouil, Erik Jan Marinissen, Farrukh Yasin, Sebastien Couet, Said Hamdioui, Gouri Sankar Kar

Proceedings of the 24th IEEE European Test Symposium, 2019

2018

Electrical Modeling of STT-MRAM Defects.

Lizhou Wu, Mottaqiallah Taouil, Siddharth Rao, Erik Jan Marinissen, Said Hamdioui

Proceedings of the IEEE International Test Conference, 2018

2017

Cross-layer design and analysis of a low power, high density STT-MRAM for embedded systems.

Manu Komalan, Sushil Sakhare, Trong Huynh Bao, Siddharth Rao, Woojin Kim, Christian Tenllado, José Ignacio Gómez, Gouri Sankar Kar, Arnaud Furnémont, Francky Catthoor

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017