Jinwook Jung

According to our database1, Jinwook Jung authored at least 43 papers between 2007 and 2022.

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Bibliography

2022
A 7-nm Four-Core Mixed-Precision AI Chip With 26.2-TFLOPS Hybrid-FP8 Training, 104.9-TOPS INT4 Inference, and Workload-Aware Throttling.
IEEE J. Solid State Circuits, 2022

2021
On the large-time behavior of Euler-Poisson/Navier-Stokes equations.
Appl. Math. Lett., 2021


Still Benchmarking After All These Years.
Proceedings of the ISPD '21: International Symposium on Physical Design, 2021


FlowTuner: A Multi-Stage EDA Flow Tuner Exploiting Parameter Knowledge Transfer.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

METRICS2.1 and Flow Tuning in the IEEE CEDA Robust Design Flow and OpenROAD ICCAD Special Session Paper.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

DATC RDF-2021: Design Flow and Beyond ICCAD Special Session Paper.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Fault-Criticality Assessment for AI Accelerators using Graph Convolutional Networks.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020
Local Sensitivity Analysis for the Kuramoto-Daido Model with Random Inputs in a Large Coupling Regime.
SIAM J. Math. Anal., 2020

On the Stochastic Flocking of the Cucker-Smale Flock with Randomly Switching Topologies.
SIAM J. Control. Optim., 2020

Emergence of the Consensus and Separation in an Agent-Based Model With Attractive and Singular Repulsive Forces.
SIAM J. Appl. Dyn. Syst., 2020

BISTLock: Efficient IP Piracy Protection using BIST.
Proceedings of the IEEE International Test Conference, 2020

Routing-Free Crosstalk Prediction.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

DATC RDF-2020: Strengthening the Foundation for Academic Research in IC Physical Design.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2019
Cut Optimization for Redundant Via Insertion in Self-Aligned Double Patterning.
ACM Trans. Design Autom. Electr. Syst., 2019

Integrated Latch Placement and Cloning for Timing Optimization.
ACM Trans. Design Autom. Electr. Syst., 2019

A local sensitivity analysis for the kinetic Kuramoto equation with random inputs.
Networks Heterog. Media, 2019

Standard Cell Layout Design and Placement Optimization for TFET-Based Circuits.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

DATC RDF-2019: Towards a Complete Academic Reference Design Flow.
Proceedings of the International Conference on Computer-Aided Design, 2019

2018
OWARU: Free Space-Aware Timing-Driven Incremental Placement With Critical Path Smoothing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

An efficient MILU preconditioning for solving the 2D Poisson equation with Neumann boundary condition.
J. Comput. Phys., 2018

DATC RDF: An Open Design Flow from Logic Synthesis to Detailed Routing.
CoRR, 2018

Fast Timing Analysis of Transistor-Level Full Custom Digital Circuits.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Transient Clock Power Estimation of Pre-CTS Netlist.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

DATC RDF: an academic flow from logic synthesis to detailed routing.
Proceedings of the International Conference on Computer-Aided Design, 2018

2017
Redundant Via insertion in SADP process with cut merging and optimization.
Proceedings of the 2017 IFIP/IEEE International Conference on Very Large Scale Integration, 2017

DATC RDF: Robust design flow database: Invited paper.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Redundant Via Insertion with Cut Optimization for Self-Aligned Double Patterning.
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

Pin Accessibility-Driven Cell Layout Redesign and Placement Optimization.
Proceedings of the 54th Annual Design Automation Conference, 2017

2016
OWARU: free space-aware timing-driven incremental placement.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016

OpenDesign flow database: the infrastructure for VLSI design and design automation research.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016

Localized DNA circuit design with majority gates.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016

2015
Physical synthesis of DNA circuits with spatially localized gates.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

2014
A 40-nm Resilient Cache Memory for Dynamic Variation Tolerance Delivering ×91 Failure Rate Improvement under 35% Supply Voltage Fluctuation.
IEICE Trans. Electron., 2014

Design and Optimization of Multiple-Mesh Clock Network.
Proceedings of the VLSI-SoC: Internet of Things Foundations, 2014

A 40-nm resilient cache memory for dynamic variation tolerance with bit-enhancing memory and on-chip diagnosis structures delivering ×91 failure rate improvement.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

2013
Reconfiguring Cache Associativity: Adaptive Cache Design for Wide-Range Reliable Low-Voltage Operation Using 7T/14T SRAM.
IEICE Trans. Electron., 2013

Energy-efficient Spin-Transfer Torque RAM cache exploiting additional all-zero-data flags.
Proceedings of the International Symposium on Quality Electronic Design, 2013

2011
256-KB associativity-reconfigurable cache with 7T/14T SRAM for aggressive DVS down to 0.57 V.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

2009
NIRS-SPM: Statistical parametric mapping for near-infrared spectroscopy.
NeuroImage, 2009

2008
General linear model and inference for near infrared spectroscopy using global confidence region analysis.
Proceedings of the 2008 IEEE International Symposium on Biomedical Imaging: From Nano to Macro, 2008

2007
Performance Improvement of SCTP for Heterogeneous Ubiquitous Environment.
Proceedings of the Human Interface and the Management of Information. Methods, 2007


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