Youngjoo Lee
This page is a disambiguation page, it actually contains multiple papers from persons of the same or a similar name.
Known people with the same name:
- Youngjoo Lee 001 (Yonsei University, Seoul, Korea)
- Youngjoo Lee 002 (Korea Advanced Institute of Science and Technology, Daejeon, Korea)
- Youngjoo Lee 003 (LG Electronics, Yeongdeungpo-gu, Seoul, Korea)
- Youngjoo Lee 004 (Korea Basic Science Institute, Seoul, Kora)
Bibliography
2026
31.7 LUT-SSM: A 99.3TFLOPS/W LUT-Based State-Space Model Accelerator Using Energy-Efficient Element-Wise Layer Fusion and LUT-Friendly Weight-Only Quantization.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026
2.5 A 1.1mm<sup>2</sup>, 14.4ns, 13.1pJ/b Forward Error Correction with Ordered-Statistics Post Processing for Ultra-Reliable and Low-Latency Communications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026
Low-Latency Software-Defined 5G NR PUSCH Receiver with Mixed-Precision SIMD Acceleration.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026
Memory-Efficient Twiddle Factor Generator in Parallel NTT Accelerators for FHE Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026
Proceedings of the Design, Automation & Test in Europe Conference, 2026
2025
Proceedings of the IEEE Symposium on Security and Privacy, 2025
Cost-efficient Processing-in-Memory Architecture with Training-free and Universal Error Compensation.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2025
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2025
Panacea: Novel DNN Accelerator using Accuracy-Preserving Asymmetric Quantization and Energy-Saving Bit-Slice Sparsity.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2025
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2025
On the Hardware Efficiency of Short-Length Polarization-Adjusted Convolutional Polar Decoders.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2025
FPGA-Based Real-Time ISP Accelerator Using Low-Cost Line Buffers and Non-Linear Functions.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2025
2024
16.1 A 2.7-to-13.3μJ/boot/slot Flexible RNS-CKKS Processor in 28nm CMOS Technology for FHE-Based Privacy-Preserving Computing.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
Proceedings of the 21st International SoC Design Conference, 2024
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
Proceedings of the 15th International Conference on Information and Communication Technology Convergence, 2024
LUT-GEMM: Quantized Matrix Multiplication based on LUTs for Efficient Inference in Large-Scale Generative Language Models.
Proceedings of the Twelfth International Conference on Learning Representations, 2024
2023
A reproducible 3D convolutional neural network with dual attention module (3D-DAM) for Alzheimer's disease classification.
CoRR, 2023
A 2.35 Gb/s/mm<sup>2</sup> (7440, 6696) NB-LDPC Decoder over GF(32) using Memory-Reduced Column-Wise Trellis Min-Max Algorithm in 28nm CMOS Technology.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
GROW: A Row-Stationary Sparse-Dense GEMM Accelerator for Memory-Efficient Graph Convolutional Neural Networks.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023
TF-MVP: Novel Sparsity-Aware Transformer Accelerator with Mixed-Length Vector Pruning.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2022
nuQmm: Quantized MatMul for Efficient Inference of Large-Scale Generative Language Models.
CoRR, 2022
Proceedings of the 19th International SoC Design Conference, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
2021
Proceedings of the 18th International SoC Design Conference, 2021
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021
A 7Gbps (160, 80) Non-Binary LDPC Decoder with Dual-Message EMS Algorithm in 22nm FinFET Technology.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021
2020
IEEE Robotics Autom. Lett., 2020
2018
Data Transfusion: Pairing Wearable Devices and Its Implication on Security for Internet of Things.
IEEE Access, 2018
2017
Proceedings of the 2017 ACM SIGSAC Conference on Computer and Communications Security, 2017
2016
Proceedings of the Neural Information Processing - 23rd International Conference, 2016
2015
Binary tree optimization using genetic algorithm for multiclass support vector machine.
Expert Syst. Appl., 2015
2013
Inf. Syst. Frontiers, 2013