Directly-trained Spiking Neural Networks for Deep Reinforcement Learning: Energy efficient implementation of event-based obstacle avoidance on a neuromorphic accelerator.

[BibT_eX]

[DOI]

Luca Zanatta

Alfio Di Mauro

Neurocomputing, December, 2023

A Survey on Design Methodologies for Accelerating Deep Learning on Heterogeneous Architectures.

[BibT_eX]

[DOI]

CoRR, 2023

RISC-V Processor Technologies for Aerospace Applications in the ISOLDE Project.

[BibT_eX]

[DOI]

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2023

On the Containerization and Orchestration of RISC-V architectures for Edge-Cloud computing.

[BibT_eX]

[DOI]

Proceedings of the 3rd Eclipse Security, 2023

RUST-Encoded Stream Ciphers on a RISC-V Parallel Ultra-Low-Power Processor (Invited Paper).

[BibT_eX]

[DOI]

Proceedings of the 14th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 12th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2023

2022

Making the Most of Scarce Input Data in Deep Learning-Based Source Code Classification for Heterogeneous Device Mapping.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Monte Cimone: Paving the Road for the First Generation of RISC-V High-Performance Computers.

[BibT_eX]

[DOI]

Proceedings of the 35th IEEE International System-on-Chip Conference, 2022

Time and Frequency Domain Assessment of Low-Power MEMS Accelerometers for Structural Health Monitoring.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Workshop on Metrology for Industry 4.0 & IoT, 2022

Artificial versus spiking neural networks for reinforcement learning in UAV obstacle avoidance.

[BibT_eX]

[DOI]

Proceedings of the CF '22: 19th ACM International Conference on Computing Frontiers, Turin, Italy, May 17, 2022

Meet Monte Cimone: exploring RISC-V high performance compute clusters.

[BibT_eX]

[DOI]

Proceedings of the CF '22: 19th ACM International Conference on Computing Frontiers, Turin, Italy, May 17, 2022

Smart Contracts for Certified and Sustainable Safety-Critical Continuous Monitoring Applications.

[BibT_eX]

[DOI]

Proceedings of the Advances in Databases and Information Systems, 2022

2021

Flexible On-Line Reconfiguration of Multi-Core Neuromorphic Platforms.

[BibT_eX]

[DOI]

IEEE Trans. Emerg. Top. Comput., 2021

Spiking Neural Network-Based Near-Sensor Computing for Damage Detection in Structural Health Monitoring.

[BibT_eX]

[DOI]

Future Internet, 2021

Exploration of Convolutional Neural Network models for source code classification.

[BibT_eX]

[DOI]

Eng. Appl. Artif. Intell., 2021

Damage Detection in Structural Health Monitoring with Spiking Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Workshop on Metrology for Industry 4.0 & IoT, 2021

Source Code Classification for Energy Efficiency in Parallel Ultra Low-Power Microcontrollers.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2019

Code Mapping in Heterogeneous Platforms Using Deep Learning and LLVM-IR.

[BibT_eX]

[DOI]

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018

Optimizing Network Traffic for Spiking Neural Network Simulations on Densely Interconnected Many-Core Neuromorphic Platforms.

[BibT_eX]

[DOI]

IEEE Trans. Emerg. Top. Comput., 2018

Mapping Spiking Neural Networks on Multi-core Neuromorphic Platforms: Problem Formulation and Performance Analysis.

[BibT_eX]

[DOI]

Proceedings of the VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms, 2018

Directed Graph Placement for SNN Simulation into a multi-core GALS Architecture.

[BibT_eX]

[DOI]

Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018

Multiple alignment of packet sequences for efficient communication in a many-core neuromorphic system: work-in-progress.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Compilers, 2018

Impact of graph partitioning on SNN placement for a multi-core neuromorphic architecture: work-in-progress.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Compilers, 2018

2017

An Efficient MPI Implementation for Multi-Coreneuromorphic Platforms.

[BibT_eX]

[DOI]

Proceedings of the New Generation of CAS, 2017

2016

Data and Commands Communication Protocol for Neuromorphic Platform Configuration.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016

Toolchain integration of runtime variability and aging awareness in multicore platforms.

[BibT_eX]

[DOI]

Ramakrishna Venkata Nittala

Francesco Barchi

Gianvito Urgese

Andrea Acquaviva

Proceedings of the 2016 Forum on Specification and Design Languages, 2016

2015

Top-Down Profiling of Application Specific Many-core Neuromorphic Platforms.

[BibT_eX]

[DOI]

Gianvito Urgese

Francesco Barchi

Enrico Macii

Proceedings of the IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2015

Francesco Barchi

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