Sebastiano Fabio Schifano

According to our database1, Sebastiano Fabio Schifano authored at least 53 papers between 2003 and 2022.

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Bibliography

2022
FER: A Benchmark for the Roofline Analysis of FPGA Based HPC Accelerators.
IEEE Access, 2022

2021
Performance assessment of FPGAs as HPC accelerators using the FPGA Empirical Roofline.
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

2020
Performance and Energy Assessment of a Lattice Boltzmann Method Based Application on the Skylake Processor.
Comput., 2020

ThunderX2 Performance and Energy-Efficiency for HPC Workloads.
Comput., 2020

2019
Optimization of lattice Boltzmann simulations on heterogeneous computers.
Int. J. High Perform. Comput. Appl., 2019

Energy-Efficiency Tuning of a Lattice Boltzmann Simulation Using MERIC.
Proceedings of the Parallel Processing and Applied Mathematics, 2019

Early Performance Assessment of the ThunderX2 Processor for Lattice Based Simulations.
Proceedings of the Parallel Processing and Applied Mathematics, 2019

Computational Performances and Energy Efficiency Assessment for a Lattice Boltzmann Method on Intel KNL.
Proceedings of the Parallel Computing: Technology Trends, 2019

Porting a Lattice Boltzmann Simulation to FPGAs Using OmpSs.
Proceedings of the Parallel Computing: Technology Trends, 2019

Energy-Efficiency Evaluation of FPGAs for Floating-Point Intensive Workloads.
Proceedings of the Parallel Computing: Technology Trends, 2019

2018
Early Experience on Running OpenStaPLE on DAVIDE.
Proceedings of the High Performance Computing, 2018

2017
Power-Efficient Computing: Experiences from the COSA Project.
Sci. Program., 2017

Evaluation of DVFS techniques on modern HPC processors and accelerators for energy-aware applications.
Concurr. Comput. Pract. Exp., 2017

Early Experience on Using Knights Landing Processors for Lattice Boltzmann Applications.
Proceedings of the Parallel Processing and Applied Mathematics, 2017

MiniSymposium on Energy Aware Scientific Computing on Low Power and Heterogeneous Architectures.
Proceedings of the Parallel Computing is Everywhere, 2017


Energy-Efficiency Evaluation of Intel KNL for HPC Workloads.
Proceedings of the Parallel Computing is Everywhere, 2017

2016
Massively parallel lattice-Boltzmann codes on large GPU clusters.
Parallel Comput., 2016

Performance and portability of accelerated lattice Boltzmann applications with OpenACC.
Concurr. Comput. Pract. Exp., 2016

2015
Experience on Vectorizing Lattice Boltzmann Kernels for Multi- and Many-Core Architectures.
Proceedings of the Parallel Processing and Applied Mathematics, 2015

Optimizing communications in multi-GPU Lattice Boltzmann simulations.
Proceedings of the 2015 International Conference on High Performance Computing & Simulation, 2015

Development of Scientific Software for HPC Architectures Using Open ACC: The Case of LQCD.
Proceedings of the 1st IEEE/ACM International Workshop on Software Engineering for High Performance Computing in Science, 2015

Energy-Performance Tradeoffs for HPC Applications on Low Power Processors.
Proceedings of the Euro-Par 2015: Parallel Processing Workshops, 2015

Accelerating Lattice Boltzmann Applications with OpenACC.
Proceedings of the Euro-Par 2015: Parallel Processing, 2015

2014
Janus II: A new generation application-driven computer for spin-system simulations.
Comput. Phys. Commun., 2014

Performance Evaluation of Scientific Applications on POWER8.
Proceedings of the High Performance Computing Systems. Performance Modeling, Benchmarking, and Simulation, 2014

A Portable OpenCL Lattice Boltzmann Code for Multi- and Many-core Processor Architectures.
Proceedings of the International Conference on Computational Science, 2014

On Portability, Performance and Scalability of an MPI OpenCL Lattice Boltzmann Code.
Proceedings of the Euro-Par 2014: Parallel Processing Workshops, 2014

2013
Benchmarking GPUs with a Parallel Lattice-Boltzmann Code.
Proceedings of the 25th International Symposium on Computer Architecture and High Performance Computing, 2013

An Optimized Lattice Boltzmann Code for BlueGene/Q.
Proceedings of the Parallel Processing and Applied Mathematics, 2013


Early Experience on Porting and Running a Lattice Boltzmann Code on the Xeon-Phi Co-Processor.
Proceedings of the International Conference on Computational Science, 2013

Benchmarking MIC architectures with Monte Carlo simulations of spin glass systems.
Proceedings of the 20th Annual International Conference on High Performance Computing, 2013

2012
Reconfigurable computing for Monte Carlo simulations: results and prospects of the Janus project
CoRR, 2012



2011
Optimization of Multi-Phase Compressible Lattice Boltzmann Codes on Massively Parallel Multi-Core Systems.
Proceedings of the International Conference on Computational Science, 2011

An FPGA-based Torus Communication Network
CoRR, 2011

Lattice Boltzmann method simulations on massively parallel multi-core architectures.
Proceedings of the 2011 Spring Simulation Multi-conference, 2011

A Multi-GPU Implementation of a D2Q37 Lattice Boltzmann Code.
Proceedings of the Parallel Processing and Applied Mathematics, 2011

2010
Lattice Boltzmann fluid-dynamics on the QPACE supercomputer.
Proceedings of the International Conference on Computational Science, 2010

Monte Carlo Simulations of Spin Systems on Multi-core Processors.
Proceedings of the Applied Parallel and Scientific Computing, 2010

2009
Janus: An FPGA-Based System for High-Performance Scientific Computing.
Comput. Sci. Eng., 2009

QPACE - a QCD parallel computer based on Cell processors.
CoRR, 2009

Monte Carlo Simulations of Spin Glass Systems on the Cell Broadband Engine.
Proceedings of the Parallel Processing and Applied Mathematics, 2009

2008
QPACE: Quantum Chromodynamics Parallel Computing on the Cell Broadband Engine.
Comput. Sci. Eng., 2008

Simulating spin systems on IANUS, an FPGA-based computer.
Comput. Phys. Commun., 2008

2007
IANUS: an FPGA-based System for High Performance Scientific Computing
CoRR, 2007


2006
Computing for LQCD: apeNEXT.
Comput. Sci. Eng., 2006

Ianus: An Adaptive FPGA Computer.
Comput. Sci. Eng., 2006

2005
The Potential of On-Chip Multiprocessing for QCD Machines.
Proceedings of the High Performance Computing, 2005

2003


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