Gabriel L. Nazar
Orcid: 0000-0001-7202-7139Affiliations:
- Federal University of Rio Grande do Sul (UFRGS), Institute of Informatics, Porto Alegre, Brazil (PhD 2013)
According to our database1,
Gabriel L. Nazar
authored at least 58 papers
between 2010 and 2025.
Collaborative distances:
Collaborative distances:
Timeline
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Online presence:
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on inf.ufrgs.br
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on orcid.org
On csauthors.net:
Bibliography
2025
A variation-aware methodology for improved processor designs for the edge computing domain.
Des. Autom. Embed. Syst., March, 2025
2024
Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024
2023
ACM Trans. Reconfigurable Technol. Syst., December, 2023
IEEE Trans. Netw. Serv. Manag., March, 2023
Proceedings of the XIII Brazilian Symposium on Computing Systems Engineering, 2023
Proceedings of the Escola de Computação PPGC/UFRGS 50 Anos: Transformando Desafios em Oportunidades Para o Futuro, 2023
2022
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022
2021
Proceedings of the XI Brazilian Symposium on Computing Systems Engineering, 2021
Proceedings of the 17th IFIP/IEEE International Symposium on Integrated Network Management, 2021
2020
Microprocess. Microsystems, 2020
A Survey on FPGA Support for the Feasible Execution of Virtualized Network Functions.
IEEE Commun. Surv. Tutorials, 2020
Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020
A Reliability-Oriented Machine Learning Strategy for Heterogeneous Multicore Application Mapping.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Low-Power and Memory-Aware Approximate Hardware Architecture for Fractional Motion Estimation Interpolation on HEVC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Throughput-Oriented Spatio-Temporal Optimization in Approximate High-Level Synthesis.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020
A Machine Learning Approach for Reliability-Aware Application Mapping for Heterogeneous Multicores.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
High-level synthesis of throughput-optimized and energy-efficient approximate designs.
Proceedings of the 17th ACM International Conference on Computing Frontiers, 2020
2019
ACM Trans. Embed. Comput. Syst., 2019
A Knapsack Methodology for Hardware-based DMR Protection against Soft Errors in Superscalar Out-of-Order Processors.
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019
Energy-Efficiency Exploration of Memory Hierarchy using NVMs for HEVC Motion Estimation.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
Improving Software-based Techniques for Soft Error Mitigation in OoO Superscalar Processors.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
2018
ACM Trans. Design Autom. Electr. Syst., 2018
J. Electron. Test., 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
Microprocess. Microsystems, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
2016
ACM Trans. Embed. Comput. Syst., 2016
Live-Out Register Fencing: Interrupt-Triggered Soft Error Correction Based on the Elimination of Register-to-Register Communication.
ACM Trans. Embed. Comput. Syst., 2016
Proceedings of the Ninth Annual Symposium on Combinatorial Search, 2016
Improving performance in VLIW soft-core processors through software-controlled scratchpads.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016
Proceedings of the 34th IEEE International Conference on Computer Design, 2016
Proceedings of the 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2016
Proceedings of the Applied Reconfigurable Computing - 12th International Symposium, 2016
2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
Permanent fault detection and diagnosis in the lightweight dual modular redundancy architecture.
Proceedings of the 16th Latin-American Test Symposium, 2015
2014
Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014
Proceedings of the 19th IEEE European Test Symposium, 2014
Adaptive Low-Power Architecture for High-Performance and Reliable Embedded Computing.
Proceedings of the 44th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2014
Reliable execution of statechart-generated correct embedded software under soft errors.
Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014
2013
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013
Proceedings of the International Conference on Compilers, 2013
2012
Simultaneous reconfiguration of issue-width and instruction cache for a VLIW processor.
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012
Adaptive parallelism exploitation under physical and real-time constraints for resilient systems.
Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012
Adapting communication for adaptable processors: A multi-axis reconfiguration approach.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012
Exploiting Modified Placement and Hardwired Resources to Provide High Reliability in FPGAs.
Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012
Proceedings of the 17th IEEE European Test Symposium, 2012
Resilient Adaptive Algebraic Architecture for Parallel Detection and Correction of Soft-Errors.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012
Proceedings of the 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2012
2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011
2010
Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, 2010