Haitong Li
Orcid: 0000-0003-3393-9252
According to our database1,
Haitong Li
authored at least 25 papers
between 2014 and 2025.
Collaborative distances:
Collaborative distances:
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Bibliography
2025
Cross-Layer Design of Vector-Symbolic Computing: Bridging Cognition and Brain-Inspired Hardware Acceleration.
CoRR, August, 2025
CoRR, March, 2025
Collaborative optimization method of cleaning operational performance and multiparameter online control system for combine harvesters.
Comput. Electron. Agric., 2025
Proceedings of the IEEE International Memory Workshop, 2025
2024
Small Fixed-Wing Unmanned Aerial Vehicle Path Following Under Low Altitude Wind Shear Disturbance.
IEEE Trans. Intell. Transp. Syst., October, 2024
CoRR, 2024
Co-designing 2.5D Silicon Photonic Accelerators for Distributed Transformer at the Edge.
Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024
Proceedings of the Device Research Conference, 2024
Special Session: Neuro-Symbolic Architecture Meets Large Language Models: A Memory-Centric Perspective.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2024
2023
Emerging Hardware Technologies and 3D System Integration for Ubiquitous Machine Intelligence.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2022
Development of Impurity-Detection System for Tracked Rice Combine Harvester Based on DEM and Mask R-CNN.
Sensors, 2022
2021
Optimal convergence rate to nonlinear diffusion waves for Euler equations with critical overdamping.
Appl. Math. Lett., 2021
2020
Timely: Pushing Data Movements And Interfaces In Pim Accelerators Towards Local And In Time Domain.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020
Proceedings of the IEEE International Conference on Networking, Sensing and Control, 2020
2019
A 43pJ/Cycle Non-Volatile Microcontroller with 4.7μs Shutdown/Wake-up Integrating 2.3-bit/Cell Resistive RAM and Resilience Techniques.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
On-Chip Memory Technology Design Space Explorations for Mobile Deep Neural Network Accelerators.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
2018
Hyperdimensional Computing Exploiting Carbon Nanotube FETs, Resistive RAM, and Their Monolithic 3D Integration.
IEEE J. Solid State Circuits, 2018
Brain-inspired computing exploiting carbon nanotube FETs and resistive RAM: Hyperdimensional computing case study.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
2016
Device and Circuit Interaction Analysis of Stochastic Behaviors in Cross-Point RRAM Arrays.
CoRR, 2016
2015
Variation-aware, reliability-emphasized design and optimization of RRAM using SPICE model.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
2014
J. Appl. Math., 2014
Proceedings of the 44th European Solid State Device Research Conference, 2014