Haozhe Zhu
Orcid: 0000-0002-6412-3996
According to our database1,
Haozhe Zhu
authored at least 36 papers
between 2017 and 2025.
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Bibliography
2025
FIT-Print: Towards False-claim-resistant Model Ownership Verification via Targeted Fingerprint.
CoRR, January, 2025
SSDM: Generated image interaction method based on spatial sparsity for diffusion models.
Neurocomputing, 2025
An optimization architecture for multi-timescale energy scheduling under renewable uncertainty.
Comput. Ind. Eng., 2025
Federated-Continual Dynamic Segmentation of Histopathology Guided by Barlow Continuity.
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2025
37.4 SHINSAI: A 586mm<sup>2</sup> Reusable Active TSV Interposer with Programmable Interconnect Fabric and 512Mb 3D Underdeck Memory.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025
A 0.22 pJ/bit Processing-in-Controller GEMV Macro with Weight Prefetch for Efficient Near-Memory Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
EIGEN: Enabling Efficient 3DIC Interconnect with Heterogeneous Dual-Layer Network-on-Active-Interposer.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2025
2024
Hi-NeRF: A Multicore NeRF Accelerator With Hierarchical Empty Space Skipping for Edge 3-D Rendering.
IEEE Trans. Very Large Scale Integr. Syst., December, 2024
SLAM-CIM: A Visual SLAM Backend Processor With Dynamic-Range-Driven-Skipping Linear-Solving FP-CIM Macros.
IEEE J. Solid State Circuits, November, 2024
FPIA: Communication-Aware Multi-Chiplet Integration With Field-Programmable Interconnect Fabric on Reusable Silicon Interposer.
IEEE Trans. Circuits Syst. I Regul. Pap., September, 2024
Trident-CIM: A LUT-Based Compute-in-Memory Macro With Trident Read Bit-Line and Partial Product Pruning.
IEEE Trans. Circuits Syst. II Express Briefs, May, 2024
FAM-Former: Global Transformer and Feature Aggregation Module for Knee MRI Age Estimation.
IEEE Trans. Instrum. Meas., 2024
Proceedings of the 57th IEEE/ACM International Symposium on Microarchitecture, 2024
A 19.7 TFLOPS/W Multiply-less Logarithmic Floating-Point CIM Architecture with Error-Reduced Compensated Approximate Adder.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
ARCTIC: Agile and Robust Compute-In-Memory Compiler with Parameterized INT/FP Precision and Built-In Self Test.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
ST-BPTT: A Memory-efficient BPTT SNN Training Approach through Gradient-Contribution-Driven Time-Step Selection.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2024
A 28nm 76.25TOPS/W RRAM/SRAM-Collaborative CIM Fine-Tuning Accelerator with RRAM-Endurance/Latency-Aware Weight Allocation for CNN and Transformer.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2024
A Real-Time Optical-Flow-based SLAM FPGA Accelerator with Inter-Frame Similarity Exploitation and Correlation-Guided Mixed-Precision Flow Update.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2024
2023
A 28nm 53.8TOPS/W 8b Sparse Transformer Accelerator with In-Memory Butterfly Zero Skipper for Unstructured-Pruned NN and CIM-Based Local-Attention-Reusable Engine.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
A Scalable Die-to-Die Interconnect with Replay and Repair Schemes for 2.5D/3D Integration.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
A $2.53 \mu \mathrm{W}/\text{channel}$ Event-Driven Neural Spike Sorting Processor with Sparsity-Aware Computing-In-Memory Macros.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Bit-Offsetter: A Bit-serial DNN Accelerator with Weight-offset MAC for Bit-wise Sparsity Exploitation.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023
2022
A 28 nm 81 Kb 59-95.3 TOPS/W 4T2R ReRAM Computing-in-Memory Accelerator With Voltage-to-Time-to-Digital Based Output.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2022
Proceedings of the IEEE International Conference on Robotics and Biomimetics, 2022
COMB-MCM: Computing-on-Memory-Boundary NN Processor with Bipolar Bitwise Sparsity Optimization for Scalable Multi-Chiplet-Module Edge Machine Learning.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
A 11.6μ W Computing-on-Memory-Boundary Keyword Spotting Processor with Joint MFCC-CNN Ternary Quantization.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2021
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021
Computing Utilization Enhancement for Chiplet-based Homogeneous Processing-in-Memory Deep Learning Processors.
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
Proceedings of the 14th IEEE International Conference on ASIC, 2021
2020
A Communication-Aware DNN Accelerator on ImageNet Using In-Memory Entry-Counting Based Algorithm-Circuit-Architecture Co-Design in 65-nm CMOS.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2020
Tanji: a General-purpose Neural Network Accelerator with Unified Crossbar Architecture.
IEEE Des. Test, 2020
XNORAM: An Efficient Computing-in-Memory Architecture for Binary Convolutional Neural Networks with Flexible Dataflow Mapping.
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020
2019
TRPN: Matrix Factorization Meets Recurrent Neural Network for Temporal Rating Prediction.
Proceedings of the Web and Big Data - Third International Joint Conference, 2019
2018
OCEAN: An On-Chip Incremental-Learning Enhanced Artificial Neural Network Processor With Multiple Gated-Recurrent-Unit Accelerators.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018
2017
OCEAN: An on-chip incremental-learning enhanced processor with gated recurrent neural network accelerators.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017