Mahyar Samani

Orcid: 0000-0001-8253-2753

According to our database1, Mahyar Samani authored at least 13 papers between 2020 and 2026.

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Bibliography

2026
Toward Reproducible and Standardized Computer Architecture Simulation with gem5.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2026

Nugget: Portable Program Snippets.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2026

2025
Reproducibility and Standardization in gem5 Resources v25.0.
CoRR, December, 2025

Portable Targeted Sampling Framework Using LLVM.
CoRR, September, 2025

TEGRA - Scaling Up Graph Processing with Disaggregated Computing.
Proceedings of the SC '25 Workshops of the International Conference for High Performance Computing, 2025

Implications of Full-System Modeling for Superconducting Architectures.
Proceedings of the SC '25 Workshops of the International Conference for High Performance Computing, 2025

NOVA: A Novel Vertex Management Architecture for Scalable Graph Processing.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2025

2024
TEGRA - Scaling Up Terascale Graph Processing with Disaggregated Computing.
CoRR, 2024

2023
Scalable Hardware Acceleration of Graph Processing with Photonic Interconnects.
Proceedings of the International Conference on Photonics in Switching and Computing, 2023

2022
A Model for Scalable and Balanced Accelerators for Graph Processing.
IEEE Comput. Archit. Lett., 2022

LLM: Realizing Low-Latency Memory by Exploiting Embedded Silicon Photonics for Irregular Workloads.
Proceedings of the High Performance Computing - 37th International Conference, 2022

2021
Enabling Reproducible and Agile Full-System Simulation.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2021

2020
The gem5 Simulator: Version 20.0+.
CoRR, 2020


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