Ayaz Akram

Orcid: 0000-0002-2201-6551

According to our database1, Ayaz Akram authored at least 21 papers between 2016 and 2024.

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Bibliography

2024
Accelerating Computer Architecture Simulation through Machine Learning.
CoRR, 2024

2023
A Cycle-level Unified DRAM Cache Controller Model for 3DXPoint Memory Systems in gem5.
CoRR, 2023

The Feasibility of Utilizing Low-Power DRAM in Disaggregated Systems.
Proceedings of the International Symposium on Memory Systems, 2023

Enabling Design Space Exploration of DRAM Caches for Emerging Memory Systems.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2023

2022
SoK: Limitations of Confidential Computing via TEEs for High-Performance Compute Systems.
Proceedings of the 2022 IEEE International Symposium on Secure and Private Execution Environment Design (SEED), 2022

2021
Enabling Reproducible and Agile Full-System Simulation.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2021

Performance Analysis of Scientific Computing Workloads on General Purpose TEEs.
Proceedings of the 35th IEEE International Parallel and Distributed Processing Symposium, 2021

2020
The Tribes of Machine Learning and the Realm of Computer Architecture.
CoRR, 2020

Performance Analysis of Scientific Computing Workloads on Trusted Execution Environments.
CoRR, 2020

The gem5 Simulator: Version 20.0+.
CoRR, 2020

WHISPER: A Tool for Run-Time Detection of Side-Channel Attacks.
IEEE Access, 2020

Meet the Sherlock Holmes' of Side Channel Leakage: A Survey of Cache SCA Detection Techniques.
IEEE Access, 2020

2019
A Survey of Computer Architecture Simulation Techniques and Tools.
IEEE Access, 2019

Validation of the gem5 Simulator for x86 Architectures.
Proceedings of the 2019 IEEE/ACM Performance Modeling, 2019

FlexCPU: A Configurable Out-of-Order CPU Abstraction.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2019

A Study of Performance and Power Consumption Differences Among Different ISAs.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

Sherlock Holmes of Cache Side-Channel Attacks in Intel's x86 Architecture.
Proceedings of the 7th IEEE Conference on Communications and Network Security, 2019

2018
NIGHTs-WATCH: a cache-based side-channel intrusion detector using hardware performance counters.
Proceedings of the 7th International Workshop on Hardware and Architectural Support for Security and Privacy, 2018

Machine Learning For Security: The Case of Side-Channel Attack Detection at Run-time.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Run-time Detection of Prime + Probe Side-Channel Attack on AES Encryption Algorithm.
Proceedings of the 2018 Global Information Infrastructure and Networking Symposium, 2018

2016
×86 computer architecture simulators: A comparative study.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016


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