A. Asenov
According to our database1,
A. Asenov
authored at least 94 papers
between 1994 and 2023.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2011, "For contributions to the understanding and prediction of semiconductor device variability via modeling and simulation".
Timeline
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Bibliography
2023
Fully Convolutional Generative Machine Learning Method for Accelerating Non-Equilibrium Greens Function Simulations.
CoRR, 2023
2022
Carbon Nanotube SRAM in 5-nm Technology Node Design, Optimization, and Performance Evaluation - Part II: CNT Interconnect Optimization.
IEEE Trans. Very Large Scale Integr. Syst., 2022
Carbon Nanotube SRAM in 5-nm Technology Node Design, Optimization, and Performance Evaluation - Part I: CNFET Transistor Optimization.
IEEE Trans. Very Large Scale Integr. Syst., 2022
2021
Proceedings of the 14th IEEE International Conference on ASIC, 2021
2019
Proceedings of the NeurIPS 2019 Competition and Demonstration Track, 2019
Proceedings of the Large-Scale Scientific Computing - 12th International Conference, 2019
Techniques for Statistical Enhancement in a 2D Multi-subband Ensemble Monte Carlo Nanodevice Simulator.
Proceedings of the Large-Scale Scientific Computing - 12th International Conference, 2019
Proceedings of the 13th IEEE International Conference on ASIC, 2019
2018
Comput. Phys. Commun., 2018
Proceedings of the Numerical Methods and Applications - 9th International Conference, 2018
Impact of the Trap Attributes on the Gate Leakage Mechanisms in a 2D MS-EMC Nanodevice Simulator.
Proceedings of the Numerical Methods and Applications - 9th International Conference, 2018
Proceedings of the Computational Methods and Clinical Applications for Spine Imaging, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
Int. J. Adv. Corp. Learn., 2017
Proceedings of the 2017 International Symposium on VLSI Design, Automation and Test, 2017
2016
Multivariate Modeling of Variability Supporting Non-Gaussian and Correlated Parameters.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
Multi-scale electrothermal simulation and modelling of resistive random access memory devices.
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016
2015
Comparison of Si < 100 > and < 110 > crystal orientation nanowire transistor reliability using Poisson-Schrödinger and classical simulations.
Microelectron. Reliab., 2015
Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015
Unified approach for simulation of statistical reliability in nanoscale CMOS transistors from devices to circuits.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Statistical simulations of 6T-SRAM cell ageing using a reliability aware simulation flow.
Proceedings of the 45th European Solid State Device Research Conference, 2015
Proceedings of the 45th European Solid State Device Research Conference, 2015
2014
Microelectron. Reliab., 2014
Microelectron. Reliab., 2014
Microelectron. Reliab., 2014
Multi-scale Computational Framework for Evaluating of the Performance of Molecular Based Flash Cells.
Proceedings of the Numerical Methods and Applications - 8th International Conference, 2014
Factoring variability in the Design/Technology Co Optimisation (DTCO) in advanced CMOS.
Proceedings of the 19th IEEE European Test Symposium, 2014
Accurate simulations of the interplay between process and statistical variability for nanoscale FinFET-based SRAM cell stability.
Proceedings of the 44th European Solid State Device Research Conference, 2014
FDSOI molecular flash cell with reduced variability for low power flash applications.
Proceedings of the 44th European Solid State Device Research Conference, 2014
2013
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
Impact of statistical parameter set selection on the statistical compact model accuracy: BSIM4 and PSP case study.
Microelectron. J., 2013
Statistical Variability and Reliability and the Impact on Corresponding 6T-SRAM Cell Design for a 14-nm Node SOI FinFET Technology.
IEEE Des. Test, 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Evaluating the accuracy of SRAM margin simulation through large scale Monte-Carlo simulations with accurate compact models.
Proceedings of 2013 International Conference on IC Design & Technology, 2013
Impact of statistical variability and charge trapping on 14 nm SOI FinFET SRAM cell stability.
Proceedings of the European Solid-State Device Research Conference, 2013
Multi-scale computational framework for the evaluation of variability in the programing window of a flash cell with molecular storage.
Proceedings of the European Solid-State Device Research Conference, 2013
Proceedings of the European Solid-State Device Research Conference, 2013
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
2012
Impact of random dopant fluctuations on trap-assisted tunnelling in nanoscale MOSFETs.
Microelectron. Reliab., 2012
Microelectron. Reliab., 2012
Accurate capturing of the statistical aspect of NBTI/PBTI variability into statistical compact models.
Microelectron. J., 2012
A framework to study time-dependent variability in circuits at sub-35nm technology nodes.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 18th IEEE International On-Line Testing Symposium, 2012
Statistical variability in 14-nm node SOI FinFETs and its impact on corresponding 6T-SRAM cell design.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012
Proceedings of the 2012 European Solid-State Device Research Conference, 2012
Comprehensive statistical comparison of RTN and BTI in deeply scaled MOSFETs by means of 3D 'atomistic' simulation.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012
2011
Implementation of the Density Gradient Quantum Corrections for 3-D Simulations of Multigate Nanoscaled Transistors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
TRAMS Project: Variability and Reliability of SRAM Memories in sub-22 nm Bulk-CMOS Technologies.
Proceedings of the 2nd European Future Technologies Conference and Exhibition, 2011
Genet. Program. Evolvable Mach., 2011
Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011
Modelling circuit performance variations due to statistical variability: Monte Carlo static timing analysis.
Proceedings of the Design, Automation and Test in Europe, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
2010
Impact of interface state trap density on the performance characteristics of different III-V MOSFET architectures.
Microelectron. Reliab., 2010
IEEE Des. Test Comput., 2010
Proceedings of the Numerical Methods and Applications - 7th International Conference, 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010
2009
Proceedings of the Large-Scale Scientific Computing, 7th International Conference, 2009
Impact of Random Dopant Induced Statistical Variability on Inverter Switching Trajectories and Timing Variability.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2008
Statistical simulation of random dopant induced threshold voltage fluctuations for 35 nm channel length MOSFET.
Microelectron. Reliab., 2008
Statistical aspects of reliability in bulk MOSFETs with multiple defect states and random discrete dopants.
Microelectron. Reliab., 2008
Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2008
Proceedings of the Fourth International Conference on e-Science, 2008
2007
Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007
The scalability of 8T-SRAM cells under the influence of intrinsic parameter fluctuations.
Proceedings of the 33rd European Solid-State Circuits Conference, 2007
Proceedings of the Third International Conference on e-Science and Grid Computing, 2007
2005
A High-Performance Parallel Device Simulator for High Electron Mobility Transistors.
Proceedings of the Parallel Computing: Current & Future Issues of High-End Computing, 2005
2004
Impact of device geometry and doping strategy on linearity and RF performance in Si/SiGe MODFETs.
Microelectron. Reliab., 2004
Proceedings of the 33rd European Solid-State Circuits Conference, 2004
2003
Nonequilibrium and ballistic transport, and backscattering in decanano HEMTs: a Monte Carlo simulation study.
Math. Comput. Simul., 2003
2001
VLSI Design, 2001
Soft Sphere Model for Electron Correlation and Scattering in the Atomistic Modelling of Semiconductor Devices.
VLSI Design, 2001
1999
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
1998
VLSI Design, 1998
VLSI Design, 1998
VLSI Design, 1998
VLSI Design, 1998
VLSI Design, 1998
A New Approach based on Brownian Motion for the Simulation of Ultra-Small Semiconductor Devices.
VLSI Design, 1998
1996
Simul. Pract. Theory, 1996
Optimum partitioning of topologically rectangular grids.
Proceedings of the EUROSIM'96, 1996
1995
A Virtual IC Factory in an Undergraduate Semiconductor Device Fabrication Laboratory.
Proceedings of the EUROSIM'96, 1995
1994
Speed-Up of Scalable Iterative Linear Solvers Implemented on an Array of Transputers.
Parallel Comput., 1994
Parallel Simulation of Semiconductor Devices.
Proceedings of the Massively Parallel Processing Applications and Develompent, 1994