Sayandip De

Orcid: 0000-0002-5538-561X

According to our database1, Sayandip De authored at least 14 papers between 2018 and 2023.

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Bibliography

2023
Delay Prediction for ASIC HLS: Comparing Graph-Based and Nongraph-Based Learning Models.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2023


2022
Dilate-Invariant Temporal Convolutional Network for Real-Time Edge Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

AERO: Design Space Exploration Framework for Resource-Constrained CNN Mapping on Tile-Based Accelerators.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2022

CONVOLVE: Smart and seamless design of smart edge processors.
CoRR, 2022

2021
Optimizing Multiprocessor Image-Based Control Through Pipelining and Parallelism.
IEEE Access, 2021

Hardware- and Situation-Aware Sensing for Robust Closed-Loop Control Systems.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020
Approximation-Aware Design of an Image-Based Control System.
IEEE Access, 2020

Approximation Trade Offs in an Image-Based Control System.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
IMACS: A Framework for Performance Evaluation of Image Approximation in a Closed-loop System.
Proceedings of the 8th Mediterranean Conference on Embedded Computing, 2019

An Automated Approximation Methodology for Arithmetic Circuits.
Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019

Fault Tolerant FPGAs: Where to Spend the Effort?
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

2018
FPGA implementation of semi-fragile reversible watermarking by histogram bin shifting in real time.
J. Real Time Image Process., 2018

Designing Energy Efficient Approximate Multipliers for Neural Acceleration.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018


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