Sébastien Haendler

According to our database1, Sébastien Haendler authored at least 16 papers between 2000 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2021
Circuit-level evaluation of a new zero-cost transistor in an embedded non-volatile memory CMOS technology.
Proceedings of the 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2021

2019
28nm FDSOI Platform with Embedded PCM for IoT, ULP, Digital, Analog, Automotive and others Applications.
Proceedings of the 49th European Solid-State Device Research Conference, 2019

2018
Reliability assessment of 4GSP/s interleaved SAR ADC.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

2017
Characterization, modeling and comparison of 1/f noise in Si/SiGe: C HBTs issued from three advanced BiCMOS technologies.
Proceedings of the 29th International Conference on Microelectronics, 2017

2016
28nm FDSOI technology sub-0.6V SRAM Vmin assessment for ultra low voltage applications.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

2015
New LFN and RTN analysis methodology in 28 and 14nm FD-SOI MOSFETs.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

2014
Dispersion study of DC and Low Frequency Noise in SiGe: C Heterojunction Bipolar Transistors used for mm-Wave to Terahertz applications.
Microelectron. Reliab., 2014

Study of low frequency noise in advanced SiGe: C heterojunction bipolar transistors.
Proceedings of the 44th European Solid State Device Research Conference, 2014

Statistical analysis of dynamic variability in 28nm FD-SOI MOSFETs.
Proceedings of the 44th European Solid State Device Research Conference, 2014

2013
6T SRAM performance and power gain using double gate MOS in 28nm FDSOI technology.
Proceedings of 2013 International Conference on IC Design & Technology, 2013

Circuit optimization of 4T, 6T, 8T, 10T SRAM bitcells in 28nm UTBB FD-SOI technology using back-gate bias control.
Proceedings of the ESSCIRC 2013, 2013

2012
Impact of front-back gate coupling on low frequency noise in 28 nm FDSOI MOSFETs.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012

2009

2003
Low frequency noise in 0.12 mum partially and fully depleted SOI technology.
Microelectron. Reliab., 2003

2001
Improved analysis of low frequency noise in dynamic threshold MOS/SOI transistors.
Microelectron. Reliab., 2001

2000
0.25 μm SOI technologies performance for low-power radio-frequency applications.
Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000


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