Mingfei Yu

According to our database, Mingfei Yu authored at least 18 papers between 2020 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2025

Cut Tracing with E-Graphs for Boolean FHE Circuit Synthesis.

Julien de Castelnau, Mingfei Yu, Giovanni De Micheli

CoRR, June, 2025

Back-end-aware Fault-tolerant Quantum Oracle Synthesis.

Mingfei Yu, Alessandro Tempia Calvino, Mathias Soeken, Giovanni De Micheli

Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

2024

Expediting Homomorphic Computation via Multiplicative Complexity-aware Multiplicative Depth Minimization.

Mingfei Yu, Giovanni De Micheli

IACR Cryptol. ePrint Arch., 2024

On the Synthesis of High-performance Homomorphic Boolean Circuits.

Mingfei Yu, Sergiu Carpov, Alessandro Tempia Calvino, Giovanni De Micheli

Proceedings of the 12th Workshop on Encrypted Computing & Applied Homomorphic Cryptography, 2024

RareLS: Rarity-Reducing Logic Synthesis for Mitigating Hardware Trojan Threats.

Chang Meng, Mingfei Yu, Hanyu Wang, Wayne P. Burleson, Giovanni De Micheli

Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024

Technology-Aware Logic Synthesis for Superconducting Electronics.

Rassul Bairamkulov, Siang-Yun Lee, Alessandro Tempia Calvino, Dewmini Sudara Marakkalage, Mingfei Yu, Giovanni De Micheli

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

Unleashing the Power of T1-cells in SFQ Arithmetic Circuits.

Rassul Bairamkulov, Mingfei Yu, Giovanni De Micheli

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023

Garbled Circuits Reimagined: Logic Synthesis Unleashes Efficient Secure Computation.

Mingfei Yu, Dewmini Sudara Marakkalage, Giovanni De Micheli

Cryptogr., September, 2023

SCP-SLAM: Accelerating DynaSLAM With Static Confidence Propagation.

Mingfei Yu, Lei Zhang, Wu-Fan Wang, Jia-Hui Wang

Proceedings of the IEEE Conference Virtual Reality and 3D User Interfaces, 2023

Striving for Both Quality and Speed: Logic Synthesis for Practical Garbled Circuits.

Mingfei Yu, Giovanni De Micheli

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

Generating Lower-Cost Garbled Circuits: Logic Synthesis Can Help.

Mingfei Yu, Giovanni De Micheli

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2023

2022

Parallel Scheduling Attention Mechanism: Generalization and Optimization.

Mingfei Yu, Yukio Miyasaka, Masahiro Fujita

IPSJ Trans. Syst. LSI Des. Methodol., 2022

Low-Precision Quantization Techniques for Hardware-Implementation-Friendly BERT Models.

Xinpei Zhang, Yi Ding, Mingfei Yu, Shin-ichi O'Uchi, Masahiro Fujita

Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

2021

Loop Closure Detection by Using Global and Local Features With Photometric and Viewpoint Invariance.

Mingfei Yu, Lei Zhang, Wufan Wang, Hua Huang

IEEE Trans. Image Process., 2021

Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization.

Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B. Manske, Matheus F. Pontes, Leomar S. da Rosa, Marilton S. de Aguiar, Paulo F. Butzen, Po-Chun Chien, Yu-Shan Huang, Hoa-Ren Wang, Jie-Hong R. Jiang, Jiaqi Gu, Zheng Zhao, Zixuan Jiang, David Z. Pan, Brunno A. Abreu, Isac de Souza Campos, Augusto Andre Souza Berndt, Cristina Meinhardt, Jônata Tyska Carvalho, Mateus Grellert, Sergio Bampi, Aditya Lohana, Akash Kumar, Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu, Yuan Zhou, Jordan Dotzel, Yichi Zhang, Hanyu Wang, Zhiru Zhang, Valerio Tenace, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Satrajit Chatterjee

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Logic Synthesis for Generalization and Learning Addition.

Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

A Decomposition-Based Synthesis Algorithm for Sparse Matrix-Vector Multiplication in Parallel Communication Structure.

Mingfei Yu, Ruitao Gao, Masahiro Fujita

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020

Parallel Scheduling Self-attention Mechanism: Generalization and Optimization.

Mingfei Yu, Masahiro Fujita

CoRR, 2020