Pia N. Sanda

According to our database, Pia N. Sanda authored at least 17 papers between 1998 and 2010.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2010

Cross-layer resilience challenges: Metrics and optimization.

Subhasish Mitra, Kevin Brelsford, Pia N. Sanda

Proceedings of the Design, Automation and Test in Europe, 2010

2008

Fault-Tolerant Design of the IBM Power6 Microprocessor.

Kevin Reick, Pia N. Sanda, Scott B. Swaney, Jeffrey W. Kellington, Michael J. Mack, Michael S. Floyd, Daniel Henderson

IEEE Micro, 2008

Soft-error resilience of the IBM POWER6 processor.

Pia N. Sanda, Jeffrey W. Kellington, Prabhakar Kudva, Ronald N. Kalla, Ryan B. McBeth, Jerry Ackaret, Ryan Lockwood, John Schumann, Christopher R. Jones

IBM J. Res. Dev., 2008

Phaser: Phased methodology for modeling the system-level effects of soft errors.

Jude A. Rivers, Pradip Bose, Prabhakar Kudva, John-David Wellman, Pia N. Sanda, Ethan H. Cannon, Luiz C. Alves

IBM J. Res. Dev., 2008

Soft-error resilience of the IBM POWER6 processor input/output subsystem.

Carl A. Bender, Pia N. Sanda, Prabhakar Kudva, Ricardo Mata, Vikas Pokala, Ryan Haraden, Matthew Schallhorn

IBM J. Res. Dev., 2008

Statistical Fault Injection.

Pradeep Ramachandran, Prabhakar Kudva, Jeffrey W. Kellington, John Schumann, Pia N. Sanda

Proceedings of the 38th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2008

Soft Errors: System Effects, Protection Techniques and Case Studies.

Dimitris Gizopoulos, Kaushik Roy, Subhasish Mitra, Pia N. Sanda

Proceedings of the Design, Automation and Test in Europe, 2008

2007

Soft Errors: Technology Trends, System Effects, and Protection Techniques.

Subhasish Mitra, Pia N. Sanda, Norbert Seifert

Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007

2005

Guest Editors' Introduction: Reliability-Aware Microarchitecture.

Sarita V. Adve, Pia N. Sanda

IEEE Micro, 2005

The concern for soft errors is not overblown.

Pia N. Sanda

Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

2003

Latchup Analysis Using Emission Microscopy.

Franco Stellari, Peilin Song, Moyra K. McManus, Alan J. Weger, Robert Gauthier, Kiran V. Chatty, Mujahid Muhammad, Pia N. Sanda, Philip Wu, Steve Wilson

Microelectron. Reliab., 2003

Optical and Electrical Testing of Latchup in I/O Interface Circuits.

Franco Stellari, Peilin Song, Moyra K. McManus, Robert Gauthier, Alan J. Weger, Kiran V. Chatty, Mujahid Muhammad, Pia N. Sanda

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

2000

Non-invasive timing analysis of IBM G6 microprocessor L1 cache using picosecond imaging circuit analysis.

Stanislav Polonsky, Moyra K. McManus, Daniel R. Knebel, Steve Steen, Pia N. Sanda

Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000

1999

Implementation of a self-resetting CMOS 64-bit parallel adder with enhanced testability.

Wei Hwang, George Diedrich Gristede, Pia N. Sanda, Shao Y. Wang, David F. Heidel

IEEE J. Solid State Circuits, 1999

The attack of the "Holey Shmoos": a case study of advanced DFD and picosecond imaging circuit analysis (PICA).

William V. Huott, Moyra K. McManus, Daniel R. Knebel, Steve Steen, Dennis Manzer, Pia N. Sanda, Steve Wilson, Yuen H. Chan, Antonio Pelella, Stanislav Polonsky

Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

1998

Diagnosis and characterization of timing-related defects by time-dependent light emission.

Daniel R. Knebel, Pia N. Sanda, Moyra K. McManus, Jeffrey A. Kash, James C. Tsang, David P. Vallett, Leendert M. Huisman, Phil Nigh, Rick Rizzolo, Peilin Song, Franco Motika

Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

Design and implementation of high performance dynamic 64-bit parallel adder with enhanced testability.

Wei Hwang, George Diedrich Gristede, Pia N. Sanda, Shao Y. Wang, David F. Heidel

Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998