Amir Moradi
Orcid: 0000-0002-4032-7433Affiliations:
- TU Darmstadt, Germany
- Ruhr University Bochum, Germany (former)
According to our database1,
Amir Moradi
authored at least 180 papers
between 2005 and 2025.
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Bibliography
2025
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2025
Coil-Based Detection and Concurrent Error Correction Against EMFI - An Experimental Case-Study on a Prototype ASIC.
IACR Cryptol. ePrint Arch., 2025
Fault Injection Evaluation with Statistical Analysis - How to Deal with Nearly Fabricated Large Circuits.
IACR Cryptol. ePrint Arch., 2025
One More Motivation to Use Evaluation Tools This Time for Hardware Multiplicative Masking of AES.
Proceedings of the Design, Automation & Test in Europe Conference, 2025
2024
Another Evidence to not Employ Customized Masked Hardware Identifying and Fixing Flaws in SCARV.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024
JustSTART: How to Find an RSA Authentication Bypass on Xilinx UltraScale(+) with Fuzzing.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024
IACR Cryptol. ePrint Arch., 2024
IACR Commun. Cryptol., 2024
2023
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2023
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2023
IACR Cryptol. ePrint Arch., 2023
Stealthy Logic Misuse for Power Analysis Attacks in Multi-Tenant FPGAs (Extended Version).
IACR Cryptol. ePrint Arch., 2023
IACR Cryptol. ePrint Arch., 2023
Composable Gadgets with Reused Fresh Masks - First-Order Probing-Secure Hardware Circuits with only 6 Fresh Masks.
IACR Cryptol. ePrint Arch., 2023
Red Team vs. Blue Team: A Real-World Hardware Trojan Detection Case Study Across Four Modern CMOS Technology Generations.
Proceedings of the 44th IEEE Symposium on Security and Privacy, 2023
Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023
Energy Consumption of Protected Cryptographic Hardware Cores - An Experimental Study.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2023
Special Session: Mitigating Side-Channel Attacks Through Circuit to Application Layer Approaches.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2023
Proceedings of the 2023 ACM SIGSAC Conference on Computer and Communications Security, 2023
2022
PUFs Physical Learning: Accelerating the Enrollment via Delay-Based Model Extraction.
IEEE Trans. Emerg. Top. Comput., 2022
Beware of Insufficient Redundancy An Experimental Evaluation of Code-based FI Countermeasures.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022
Transitional Leakage in Theory and Practice - Unveiling Security Flaws in Masked Circuits.
IACR Cryptol. ePrint Arch., 2022
IACR Cryptol. ePrint Arch., 2022
IACR Cryptol. ePrint Arch., 2022
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2022
A Cautionary Note on Protecting Xilinx' UltraScale(+) Bitstream Encryption and Authentication Engine.
Proceedings of the 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2022
Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security, 2022
Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security, 2022
2021
IEEE Trans. Emerg. Top. Comput., 2021
Countermeasures against Static Power Attacks - Comparing Exhaustive Logic Balancing and Other Protection Schemes in 28 nm CMOS -.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021
IACR Cryptol. ePrint Arch., 2021
IACR Cryptol. ePrint Arch., 2021
Let's Take it Offline: Boosting Brute-Force Attacks on iPhone's User Authentication through SCA.
IACR Cryptol. ePrint Arch., 2021
The SPEEDY Family of Block Ciphers - Engineering an Ultra Low-Latency Cipher from Gate Level for Secure Processor Architectures.
IACR Cryptol. ePrint Arch., 2021
Generic Hardware Private Circuits - Towards Automated Generation of Composable Secure Gadgets.
IACR Cryptol. ePrint Arch., 2021
IACR Cryptol. ePrint Arch., 2021
IACR Cryptol. ePrint Arch., 2021
IEEE Access, 2021
Proceedings of the 42nd IEEE Symposium on Security and Privacy, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2021
On the Impact of Aging on Power Analysis Attacks Targeting Power-Equalized Cryptographic Circuits.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
2020
IEEE Trans. Very Large Scale Integr. Syst., 2020
IEEE Trans. Very Large Scale Integr. Syst., 2020
IEEE Trans. Inf. Forensics Secur., 2020
J. Cryptol., 2020
IACR Cryptol. ePrint Arch., 2020
The Unpatchable Silicon: A Full Break of the Bitstream Encryption of Xilinx 7-Series FPGAs.
Proceedings of the 29th USENIX Security Symposium, 2020
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020
Proceedings of the 2020 IEEE International Symposium on Hardware Oriented Security and Trust, 2020
The Risk of Outsourcing: Hidden SCA Trojans in Third-Party IP-Cores Threaten Cryptographic ICs.
Proceedings of the IEEE European Test Symposium, 2020
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
Proceedings of the Advances in Cryptology - ASIACRYPT 2020, 2020
2019
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2019
IACR Cryptol. ePrint Arch., 2019
IACR Cryptol. ePrint Arch., 2019
A Comparison of Chi^2-Test and Mutual Information as Distinguisher for Side-Channel Analysis.
IACR Cryptol. ePrint Arch., 2019
CRAFT: Lightweight Tweakable Block Cipher with Efficient Protection Against DFA Attacks.
IACR Cryptol. ePrint Arch., 2019
Proceedings of the 2019 International Conference on ReConFigurable Computing and FPGAs, 2019
Proceedings of the International Conference on Computer-Aided Design, 2019
Proceedings of the International Conference on Computer-Aided Design, 2019
Shuffle and Mix: On the Diffusion of Randomness in Threshold Implementations of Keccak.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2019
A Comparison of χ <sup>2</sup>-Test and Mutual Information as Distinguisher for Side-Channel Analysis.
Proceedings of the Smart Card Research and Advanced Applications, 2019
2018
IEEE Trans. Computers, 2018
IEEE Trans. Computers, 2018
IACR Cryptol. ePrint Arch., 2018
Yet Another Size Record for AES: A First-Order SCA Secure AES S-box Based on GF(2<sup>8</sup>) Multiplication.
IACR Cryptol. ePrint Arch., 2018
Glitch-Resistant Masking Revisited - or Why Proofs in the Robust Probing Model are Needed.
IACR Cryptol. ePrint Arch., 2018
IACR Cryptol. ePrint Arch., 2018
Proceedings of the International Conference on Computer-Aided Design, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2018
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2018
Yet Another Size Record for AES: A First-Order SCA Secure AES S-Box Based on \(\mathrm {GF}(2^8)\) Multiplication.
Proceedings of the Smart Card Research and Advanced Applications, 2018
2017
J. Cryptogr. Eng., 2017
J. Cryptogr. Eng., 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Hiding Higher-Order Side-Channel Leakage - Randomizing Cryptographic Implementations in Reconfigurable Hardware.
Proceedings of the Topics in Cryptology - CT-RSA 2017, 2017
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2017
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2017
Bit-Sliding: A Generic Technique for Bit-Serial Implementations of SPN-based Primitives - Applications to AES, PRESENT and SKINNY.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2017, 2017
Proceedings of the Advances in Cryptology - ASIACRYPT 2017, 2017
2016
Bridging the Gap: Advanced Tools for Side-Channel Leakage Estimation Beyond Gaussian Templates and Histograms.
Proceedings of the Selected Areas in Cryptography - SAC 2016, 2016
Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016
White-Box Cryptography in the Gray Box - - A Hardware Implementation and its Side Channels -.
Proceedings of the Fast Software Encryption - 23rd International Conference, 2016
ParTI - Towards Combined Hardware Countermeasures Against Side-Channel and Fault-Injection Attacks.
Proceedings of the Advances in Cryptology - CRYPTO 2016, 2016
Proceedings of the Advances in Cryptology - CRYPTO 2016, 2016
Robust and One-Pass Parallel Computation of Correlation-Based Attacks at Arbitrary Order.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2016
Improved Side-Channel Analysis Attacks on Xilinx Bitstream Encryption of 5, 6, and 7 Series.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2016
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2016, 2016
ParTI: Towards Combined Hardware Countermeasures against Side-Channeland Fault-Injection Attacks.
Proceedings of the ACM Workshop on Theory of Implementation Security, 2016
Proceedings of the ACM Workshop on Theory of Implementation Security, 2016
Side-Channel Analysis Protection and Low-Latency in Action - - Case Study of PRINCE and Midori -.
Proceedings of the Advances in Cryptology - ASIACRYPT 2016, 2016
2015
Physical Security Evaluation of the Bitstream Encryption Mechanism of Altera Stratix II and Stratix III FPGAs.
ACM Trans. Reconfigurable Technol. Syst., 2015
A Hardware-based Countermeasure to Reduce Side-Channel Leakage - Design, Implementation, and Evaluation.
IACR Cryptol. ePrint Arch., 2015
Proceedings of the Selected Areas in Cryptography - SAC 2015, 2015
Achieving side-channel protection with dynamic logic reconfiguration on modern FPGAs.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2015
Side-Channel Protection by Randomizing Look-Up Tables on Reconfigurable Hardware - Pitfalls of Memory Primitives.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2015
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2015
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2015, 2015
Assessment of Hiding the Higher-Order Leakages in Hardware - What Are the Achievements Versus Overheads?
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2015, 2015
Arithmetic Addition over Boolean Masking - Towards First- and Second-Order Resistance in Hardware.
Proceedings of the Applied Cryptography and Network Security, 2015
2014
Proceedings of the Progress in Cryptology - LATINCRYPT 2014, 2014
Proceedings of the Progress in Cryptology - INDOCRYPT 2014, 2014
Proceedings of the 2014 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2014
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2014, 2014
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2014, 2014
Proceedings of the Applied Cryptography and Network Security, 2014
2013
IEEE Trans. Computers, 2013
Introducing proxy zero-knowledge proof and utilization in anonymous credential systems.
Secur. Commun. Networks, 2013
Proceedings of the Information and Communications Security - 15th International Conference, 2013
Side-channel attacks on the bitstream encryption mechanism of Altera Stratix II: facilitating black-box analysis using software reverse-engineering.
Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013
On the Simplicity of Converting Leakages from Multivariate to Univariate - (Case Study of a Glitch-Resistant Masking Scheme).
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2013, 2013
Proceedings of the Applied Cryptography and Network Security, 2013
2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012
Proceedings of the 2012 IEEE International Symposium on Hardware-Oriented Security and Trust, 2012
Proceedings of the Advances in Cryptology - EUROCRYPT 2012, 2012
Black-Box Side-Channel Attacks Highlight the Importance of Countermeasures - An Analysis of the Xilinx Virtex-4 and Virtex-5 Bitstream Encryption Mechanism.
Proceedings of the Topics in Cryptology - CT-RSA 2012 - The Cryptographers' Track at the RSA Conference 2012, San Francisco, CA, USA, February 27, 2012
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2012, 2012
2011
Improving the energy efficiency of reversible logic circuits by the combined use of adiabatic styles.
Integr., 2011
IACR Cryptol. ePrint Arch., 2011
On the Portability of Side-Channel Attacks - An Analysis of the Xilinx Virtex 4 and Virtex 5 Bitstream Encryption Mechanism.
IACR Cryptol. ePrint Arch., 2011
Datenschutz und Datensicherheit, 2011
Proceedings of the HOST 2011, 2011
Proceedings of the Advances in Cryptology - EUROCRYPT 2011, 2011
On the Power of Fault Sensitivity Analysis and Collision Side-Channel Attacks in a Combined Setting.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2011 - 13th International Workshop, Nara, Japan, September 28, 2011
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2011 - 13th International Workshop, Nara, Japan, September 28, 2011
On the vulnerability of FPGA bitstream encryption against power analysis attacks: extracting keys from xilinx Virtex-II FPGAs.
Proceedings of the 18th ACM Conference on Computer and Communications Security, 2011
2010
Proceedings of the Post-Quantum Cryptography, Third International Workshop, 2010
Proceedings of the HOST 2010, 2010
Proceedings of the Financial Cryptography and Data Security, 2010
Proceedings of the Cryptographic Hardware and Embedded Systems, 2010
2009
Integr., 2009
Comput. Electr. Eng., 2009
Proceedings of the Information Security Applications, 10th International Workshop, 2009
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
Proceedings of the Information, Security and Cryptology, 2009
Proceedings of the Sixth International Workshop on Fault Diagnosis and Tolerance in Cryptography, 2009
Proceedings of the Progress in Cryptology, 2009
2008
IACR Cryptol. ePrint Arch., 2008
IACR Cryptol. ePrint Arch., 2008
IACR Cryptol. ePrint Arch., 2008
IACR Cryptol. ePrint Arch., 2008
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008
On the Importance of the Number of Fanouts to Prevent the Glitches in DPA-Resistant Devices.
Proceedings of the Advances in Computer Science and Engineering, 2008
On the Power of Power Analysis in the Real World: A Complete Break of the KeeLoqCode Hopping Scheme.
Proceedings of the Advances in Cryptology, 2008
2007
Proceedings of the Information Security and Cryptology, 2007
Proceedings of the Information and Communications Security, 9th International Conference, 2007
2006
Proceedings of the Cryptographic Hardware and Embedded Systems, 2006
2005
Proceedings of the Advanced Video and Signal Based Surveillance, 2005