Giacomo Pedretti

Orcid: 0000-0002-4501-8672

According to our database1, Giacomo Pedretti authored at least 47 papers between 2018 and 2025.

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Bibliography

2025
Fault-Free Analog Computing with Imperfect Hardware.
CoRR, July, 2025

Hardware-Adaptive and Superlinear-Capacity Memristor-based Associative Memory.
CoRR, May, 2025

Real-time raw signal genomic analysis using fully integrated memristor hardware.
CoRR, April, 2025

Accelerating Hybrid XOR-CNF SAT Problems Natively with In-Memory Computing.
CoRR, April, 2025

Hardware-Compatible Single-Shot Feasible-Space Heuristics for Solving the Quadratic Assignment Problem.
CoRR, March, 2025

Solving Boolean satisfiability problems with resistive content addressable memories.
CoRR, January, 2025

Controlling ReRAM's Switching Characteristics with Shadow Memory for Continual Learning.
Proceedings of the IEEE International Memory Workshop, 2025

Enhancing FPGAs with Analog In-Memory Computing Macros.
Proceedings of the 2025 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2025

Analog In-Memory Computing Enhanced FPGA for High-Throughput and Energy-Efficient Acceleration.
Proceedings of the 33rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2025

2024
RD-FAXID: Ransomware Detection with FPGA-Accelerated XGBoost.
ACM Trans. Reconfigurable Technol. Syst., December, 2024

Efficient Nonlinear Function Approximation in Analog Resistive Crossbars for Recurrent Neural Networks.
CoRR, 2024

How to Build a Quantum Supercomputer: Scaling from Hundreds to Millions of Qubits.
CoRR, 2024

Distributed Binary Optimization with In-Memory Computing: An Application for the SAT Problem.
CoRR, 2024

Roadmap to Neuromorphic Computing with Emerging Technologies.
CoRR, 2024

Computing High-Degree Polynomial Gradients in Memory.
CoRR, 2024

Acceleration of Graph Neural Networks with Heterogenous Accelerators Architecture.
Proceedings of the SC24-W: Workshops of the International Conference for High Performance Computing, 2024

HO-FPIA: High-Order Field-Programmable Ising Arrays with In-Memory Computing.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

On-Access Error Correction in Certain Types of Content-Addressable Memories.
Proceedings of the IEEE International Symposium on Information Theory, 2024

Memristive Quaternary Content-Addressable Memories for Implementing Boolean Functions.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

CAMSHAP: Accelerating Machine Learning Model Explainability with Analog CAM.
Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024

2023
RACE-IT: A Reconfigurable Analog CAM-Crossbar Engine for In-Memory Transformer Acceleration.
CoRR, 2023

X-TIME: An in-memory engine for accelerating machine learning on tabular data with CAMs.
CoRR, 2023

Design Space Exploration of Analog CAM for Tree-Based Models.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

Accelerating massive MIMO in 6G communications by analog in-memory computing circuits.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022
A general tree-based machine learning accelerator with memristive analog CAM.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
A Universal, Analog, In-Memory Computing Primitive for Linear Algebra Using Memristors.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Tree-based machine learning performed in-memory with memristive analog CAM.
CoRR, 2021

Neuromorphic Motion Detection and Orientation Selectivity by Volatile Resistive Switching Memories.
Adv. Intell. Syst., 2021

Conductance variations and their impact on the precision of in-memory computing with resistive switching memory (RRAM).
Proceedings of the IEEE International Reliability Physics Symposium, 2021

2020
In-memory computing with memristive devices.
PhD thesis, 2020

Time complexity of in-memory solution of linear systems.
CoRR, 2020

One-step regression and classification with crosspoint resistive memory arrays.
CoRR, 2020

In-Memory Eigenvector Computation in Time O (1).
Adv. Intell. Syst., 2020

Brain-Inspired Structural Plasticity through Reweighting and Rewiring in Multi-Terminal Self-Organizing Memristive Nanowire Networks.
Adv. Intell. Syst., 2020

Device and Circuit Architectures for In-Memory Computing.
Adv. Intell. Syst., 2020

A Spiking Recurrent Neural Network with Phase Change Memory Synapses for Decision Making.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Hardware Implementation of PCM-Based Neurons with Self-Regulating Threshold for Homeostatic Scaling in Unsupervised Learning.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Bio-Inspired Recurrent Neural Network with Self-Adaptive Neurons and PCM Synapses for Solving Reinforcement Learning Tasks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

In-memory PageRank using a Crosspoint Array of Resistive Switching Memory (RRAM) devices.
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020

2019
Self-organizing memristive nanowire networks with structural plasticity emulate biological neuronal circuits.
CoRR, 2019

Energy-efficient continual learning in hybrid supervised-unsupervised neural networks with PCM synapses.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

Fast Solution of Linear Systems with Analog Resistive Switching Memory (RRAM).
Proceedings of the 2019 IEEE International Conference on Rebooting Computing, 2019

A Volatile RRAM Synapse for Neuromorphic Computing.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

In-memory solution of linear systems with crosspoint arrays without iterations.
Proceedings of the Device Research Conference, 2019

2018
A 4-Transistors/1-Resistor Hybrid Synapse Based on Resistive Switching Memory (RRAM) Capable of Spike-Rate-Dependent Plasticity (SRDP).
IEEE Trans. Very Large Scale Integr. Syst., 2018

Stochastic Learning in Neuromorphic Hardware via Spike Timing Dependent Plasticity With RRAM Synapses.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

Resistive switching synapses for unsupervised learning in feed-forward and recurrent neural networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018


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